View Full Version : 82C55 datasheet clarification

April 4th, 2009, 01:23 AM
All datasheet report:

Port A: One 8-bit data output latch/buffer and one 8-bit data input latch
Port B: One 8-bit data input/output latch/buffer and one 8-bit data input buffer :confused: :confused: :confused: :confused: :(
Port C: One 8-bit data output latch/buffer and one 8-bit data input buffer (no latch for input):sneaky:

Seems confusing...
Can anybody clarify me which are the HW differences among the ports?

All are I/O programmable in different ways, that is clear ;) , but seems that they have not the same buffering and latching property...

For example input Port B: is latched or not?


April 4th, 2009, 08:33 AM
There are three modes of operation on 8255: 0, 1, and 2.

In mode 0 operation of 8255, by using the command:

IN A, (PortA)

you can read the data on e.g. gate A (PortA) directly,
and if you place the command inside a loop, you can read
the instantaneous data.

So I assume, and correct me if I am wrong, that in Mode 0,
each time you execute the command IN A, (PortX), the data
gets latched on gate X...

In modes 1, and 2, gate C is used to check the input/output
buffers on gates A and B , and send/receive strobe signals
before latching the data on these gates, respectively.

There is also some good information here:



April 4th, 2009, 12:11 PM
Mode 0 - latched output, real-time input
Mode 1 - strobed/latched output or latched input (A or B only)
Mode 2 - strobed/atched bidirectional I/O (A only).

Mode 1 and 2 use bits on port C for handshaking and status control, so the remaining bits of C can be programmed for simple Mode 0 input or output. Mode 2 operation on A can be mixed with Mode 0 or 1 operation on B.

The best reference that I've found for the 8255 is n the 1979 Intel "Peripheral Design Handbook". I don't know if it's available on the web or not. If you find one, fall on it--they're not terribly common.

April 4th, 2009, 12:42 PM
Thank you Chuck(G) for clearing so many grey areas!!