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View Full Version : Ohio Scientific...what were you thinking?



glitch
September 8th, 2010, 07:00 PM
So, I'm currently trying to figure out how I'm going to go about building a RAM board to get my OSI Challenger 3 booting CP/M. I've pretty much had to glean the bus structure from the schematics of the processor board and the RAM boards. The data bus is inverted...there's a pin called Data Direction which tells the CPU board's bus tranceivers which way data will be flowing, but it appears to be generated /on the RAM boards/, and if it weren't for the Z80 on the triple-processor board, I'd still have no idea what "Phase 2 VMA" does (it's apparently similar to the 6502's regular Phase 2 output).

To help things out, none of the bus pins on the schematics are consistently labeled. For instance, A16 and A17 of the address bus are labeled on the OSI-520 RAM board schematic, but the rest are just labeled with their bit position. It took looking over the schematics for 4 or 5 boards to get the bus pins for the major control signals, and I still have some blank spaces.

I thought the S-100 bus was supposed to be poorly planned!

MikeS
September 8th, 2010, 07:37 PM
I thought the S-100 bus was supposed to be poorly planned!Hey, dem's fightin' words!
S-100 ROOLZ!

glitch
September 8th, 2010, 07:56 PM
Hey, dem's fightin' words!
S-100 ROOLZ!

Indeed -- I'd /heard/ it was poorly planned, but never really had trouble understanding what the data bus was doing...which isn't the case with the OSI machine.

Chuck(G)
September 8th, 2010, 08:16 PM
Hey, dem's fightin' words!
S-100 ROOLZ!

You've obviously never used Multibus (which also uses an inverted bus).

NobodyIsHere
September 9th, 2010, 02:21 AM
Hi! No doubt about it -- I like S-100/IEEE-696 but it pales in comparison to Multibus I. I've seen and worked with production Multibus I systems that have been in operation 24x7 almost uninterrupted since the early 1980's. What an amazing design! Not much of a hobbyist following though. That's a shame.

Thanks and have a nice day!

Andrew Lynch

Dwight Elvey
September 9th, 2010, 06:27 AM
Hi
In any case, inverted bus means nothing to RAM. You can
leave it inverted or not.
Non-inverted had a slight advantage in timing because
the buffers were only one stage instead of two.
This was lost over time as the wire delay began to
be the larger part.
Compare a 74240 to a 74244.
Dwight

glitch
September 9th, 2010, 07:14 AM
Right, I realize that as long as what goes into the RAM is what comes out, it doesn't matter. I'd hoped to make a board using 6264 RAMs, so that you could plug in a 2764 or 27126 EPROM and use it as a PROM board too, but that would require playing with the inversion.

I'd forgotten the '240 provided inverted outputs...I've been using the '245 bidirectional tranceiver for just about everything lately!

MikeS
September 9th, 2010, 07:58 AM
I'd forgotten the '240 provided inverted outputs...I've been using the '245 bidirectional tranceiver for just about everything lately!Anything interesting in the '620 - '665 range?