View Full Version : S100 Ram/Eprom board: dip switch verification.

October 11th, 2010, 08:30 PM
Can someone explain what each dip switch does ?

Reading off the s100computers.com it is mentioned that
SW2 is for wait states, but later on in the text it states;

The switch SW2 allows one to block out or include sections.
(of memory, I assume)

Looking at the pictures, it looks like SW3 is setting one wait state.
I could be wrong... What I want to do for now is to set it up
for a Eprom 2732 to contain a test code and jump to it. I'm going
to use the original 8 bit Imsai CPU for now and a 32k memory board.

For my test I have set jumpers K31 & K22 to vcc but I'm not sure
how to set SW4 for the Eprom jump address. In the long run, I want
to set this board up for 64k of memory max and have the Eprom either
have a monitor or 8k basic (2764 Rom)

I'm learning, but I need some help from the TTL gods ;-)


October 12th, 2010, 11:51 AM
litterbox, could I suggest you use the forum on the S100Cpomputers web site for questions like this. You will have a better chance of getting a “hit” from others/me if you post there. The URL is:-

On your questions… It should be SW3 is for wait states (not SW2, that was for the earlier prototype board). Unless you are using a really fast 16 bit CPU you will need at the most one wait state with these EEPROM memory chips. So SW3,1 only closed.

To understand how the memory blocks are switched in or out you really have to understand how the 74LS682 “system” works. See the popup box on the page.

I have updated the web page with some more detail in that section. Hope this helps:-
In our demo example we will place a 2732 EPROM at 8000H in RAM. We need therefore to configure the 74LS682 IC3A such that pin 19 of IC3A goes low if the Z80 addresses RAM from 8000H to 8FFFH. So if we place in RAM the following code:-

C3 00 80

The Z80 will continuously jump to 8000H in RAM. Please see here to understand how 74LS682 addressing is done. For addresses in the range 8000H to 8FFFH, A15 will always be high and A14, A13, and A12 will always be low. So we jumper P19 and P12 as follows:- 1-1, 2-2, 3-3, 4-4. Since we are using 4K we ignore A11, so tie p19,5 to P20. We also ignore the phantom INPUT, so also P19,6 to P20 (and P19,7 to P20), but do accept the low going pulse from U14 pin 12 when S-100 addresses are < 64K (so P19 pin 8 to P21 pin 8).

On SW4 then 1-8 are:- open,closed,closed,closed, closed,closed,closed, closed.

BTW, folks we really do need a volunteer to check out the building instructions and help others with these boards. I am spending most of my time on design hardware of new (more complex) S-100 boards and really cannot at the same time properly help with board construction and write-up detailed (and correct!) step by step construction notes. Of earlier boards.

November 17th, 2010, 05:21 PM
I just finished up the SMB, so now I'm getting back
to the Eprom board project. I have a 2732 rom with
the 'bouncing lites' code burned into it. I just want
to jump to that addy and run the program.

This way I get my feet wet and as I understand it
better, I could burn a rom with the Enhanced ROM
Monitor/Loader discussed in this forum.

Looking at the doc's, shouldn't this;

So we jumper P19 and P12 as follows:- 1-1, 2-2, 3-3, 4-4. Since we are using 4K we ignore A11 so tie p19,5 to P20. We also ignore the phantom INPUT, so also P19,6 to P20 (and P19,7 tp P20), but do accept the low going pulse from U14 pin 12 when S-100 addresses are < 64K (so P19 pin 8 to P21 pin 8).

read as:

So we jumper P19 and P21 as follows:- 1-1, 2-2, 3-3, 4-4. Since we are using 4K we ignore A11 so tie p21,5 to P20. We also ignore the phantom INPUT, so also P21,6 to P20 (and P21,7 to P20), but do accept the low going pulse from U14 pin 12 when S-100 addresses are < 64K (so P19 pin 8 to P21 pin 8).

I'm not getting a low on pin 19 when looping with C3 00 80.
This is jumpered using my correction as listed above.

Andrew - Sorry for your loss.

November 18th, 2010, 10:33 AM
Litterbox99, yes, you are correct. Thanks for finding the write-up error. I will update the web site instructions. Don't know how that one got passed.

So what do you have for SW4 settings. For 8000H SW4 switch 1 (left most switch) should be open 2,3,4,5,6,7,8 closed.

November 18th, 2010, 11:13 AM
I have redone the test code so now at 0H in RAM you can load a byte @ 8000H into [A] in a continious loop.
This should get you a pulse on #19.

November 18th, 2010, 06:19 PM
SW4 is set correctly.

Your new code got me a pulse !

However I had to jump 64k_select to ground instead
of jumping it to P21,8. I only have a 32k memory board
so I don't understand why this made it work. I hope I
don't have an issue elsehere ? Once I get the rom working,
the 32k will get removed and I'l populate the rom board with ram.

On to the next step.

Thanks !

November 18th, 2010, 10:46 PM
Litterbox99, I suspect you don't have extending addressing working correctly. Temporally remove U125, bend out pin 12 of U14A and with any RAM board do loops in RAM at say 0H, 1000H, 8000H etc. Check that in every case pin 12 of U14A stays low. If it does not, bend out one at a time the pins of U11 and ground them. Look for an address line that is stuck high. If you are working in RAM <64K then 64K select is always low WHEN an address is on the bus.

November 19th, 2010, 05:57 PM
First off, I have a 8080 CPU board, so A16-23 are not used (floating)

Starting at U8 on the 'buss' side I probed A16-23 and all
were floating, not H or L. Then I probed on the 'out' side
and all were H. With this being the case, all logic downstream,
would be invalid.

Looking at the truth table for a 244, it's basically a buffer;

High in, High out
Low in, Low out.

and the way the OE's are tied to ground, there is no
entry in the truth table for Z (floating) in, X out.

With the case of the 244's I have, apparently Z in
must equal H out. That's not going to work, so I'll
just continue forward by grounding P21,8.

I suppose if I had a Z80 CPU, A16-23 would be used, so
they wouldn't be floating causing this behavior of the 244's.

Just a thought...

November 20th, 2010, 09:45 AM
If A16-A23 are floating there is no way this board will properly without mods, (or any IEEE-696 board for that matter). Minimally on your 8080 board (or somewhere else on the bus tie those address lines to ground with ~450 Ohm resistor. This is not optimum but should work.

November 21st, 2010, 02:09 PM
Ok, so I tied A16-A23 to ground. I finished populating the board with
IC's for the Eprom section as described on the s100 web page, right
up to the 16 bit circuitry section and installed the 2732.

I can now examine the contents of the Eprom by resetting
the machine and flipping up the left most swith on the Address Programmed
Input. I can view the contents of the Eprom by examine/examine next.

I can also view the Eprom by reseting the machine, toggling in C3 00 80 and
single stepping.

This is all with U2 pin 4 bent out. (if I don't, I get weird behavior as if
it's not responding)

My question is how can I 'run' what's in the Eprom ? Using C3 00 80, when I run
this, shouldn't it jump to rom and run the code ? It runs but not whats in the
rom but ramdom stuff in the RAM.

I do need to learn and understand machine language programming.
But I consider this good progress so far.

December 11th, 2010, 04:52 PM
Well I finally got the code in the Eprom to run !

First off, some errors on my part;

The code I burned to my Eprom is found here;


This code was written to start at address 0000H,
but the Eprom is at 8000H. Not knowing anything
about machine language, I studied the mnemonics
and looked at any kind 'jump' points, jpm, jnz, jz and
looked at the syntax. I simply changed as follows;

jmp c3 21 00

1100 0011
0010 0001
0000 0000

jmp c3 21 80

1100 0011
0010 0001
1000 0000

So any reference to 00 associated with a jmx
was changed to 80h 1000 0000. I only had to change
eight points in the image file and re-burned the Eprom.

Now I can jump to the Eprom and run the code !

May seem rudimentary to most, but a small step
toward progress and I learned something :-)

My next step is to add static ram to this board,
2 x 628128's, but I'm not sure why on the s100
web site the example mentioned starting at
address F0000H as opposed to starting at zero ?

December 11th, 2010, 11:35 PM
Because that's where one would normally put a system monitor ROM to load CPM etc.