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View Full Version : CP/M 2.X and IMSAI CPU-B Conflicts



Ken Vaughn
January 11th, 2011, 02:38 PM
I used CP/M 1.4x with my IMSAI/Northstar Disk Drive system back in the day. I decided to bring up CP/M 2.2x on my system today. No big deal I thought -- I already had the CBIOS code from 1.4x, and only needed to make a few changes for additional jump vectors, etc. I typed in the CBIOS routine assembled for my IMSAI and a 24K Lifeboat Associates (N*) 2.23 distribution disk. Worked fine. I then re-assembled the CBIOS code for a 56K version and made a 56K disk, but it would not run.

After a couple of hours of checking everything twice, I started to breakpoint the code and narrowed down the problem to the hardware initialization routine. Then I realized that my problem was a conflict with the CBIOS code location and the CPU-B board.

In order to setup the serial port's speed I have to enable the timers in system address space momentarily. After setting up the 8251 operational characteristics, I disable the timers from system address space and return to CP/M. I had forgotten that the command to enable the timers also enabled a 1K system monitor (ROM) at location D800H, which overlaid the CBIOS routine while I was setting up the timers.

I regenerated CP/M for a 55K version, which moved the CBIOS code below the location of the ROM. Works now!

FloppySoftware
January 12th, 2011, 04:17 AM
Well done, Ken!

It is very interesting to see that CP/M lives today.

saundby
January 12th, 2011, 10:10 PM
Wow, I'm glad you were able to get it working. It's too bad the timers and monitor ROM are tied together that way, but 1K of TPA isn't much to lose. Good thing it wasn't mapped to someplace low like 3000H or page zero.

Good work!

Ken Vaughn
January 13th, 2011, 03:14 PM
Good thing it wasn't mapped to someplace low like 3000H or page zero.


It actually wouldn't make any difference. The monitor ROM only exists in address space for a few instructions, and is quickly disabled after the timer which controls the baud rate is set up. When the timer's are disabled from address space, the monitor ROM also goes away. The problem occurs only when there is a conflict between the CBIOS initialization routine (which is setting up the timer) and the monitor ROM's address space collide. They did not conflict with each other in my 56K CP/M 1.4x implementation because the CBIOS code was in another area. I could probably find some space in a buffer or the likes to move the code while I executed it, but this is not a production system and not worth the effort. Just one of those strange problems you never think of.

saundby
January 14th, 2011, 12:27 AM
Ah, I see.

Thanks for the clarification.