View Full Version : Cm* machines, reading a DEC book.

May 14th, 2011, 12:56 AM
I was reading/browsing around a book titled "Computer Engineering, a DEC view of hardware system design", chapter 20 of this book is dedicated to the story of this Cm* cluster and all the analysis that followed.

I was wondering, does it still exist any of those ? Is there any still working ( somewhere in some museum maybe ) around ?

I tried to search a bit there and there but apart a couple of pictures in this book I have not found anything else.

May 14th, 2011, 01:33 AM
I guess you are referring to the connection machine? The Technical Museum in Stockholm has one, working when decommissioned.

May 14th, 2011, 02:13 AM
I guess you are referring to the connection machine? The Technical Museum in Stockholm has one, working when decommissioned.

No not the famous connection machine ( I think NSA has still some working ones ), not the one looking like a cube with leds.

This Cm* seems to be a DEC experiment/approach to evaulate a multi processor architecture, I think all this been done probably around 1977 , I will see if I can scan a pic ( the only one there is ) from this book and put it here, maybe someone could recognize it.

May 14th, 2011, 02:23 AM
Here, the only picture that seems to be :


May 14th, 2011, 07:04 AM
Wikipedia has an artice on the C.mmp which leads to several PDF articles regarding its history. http://en.wikipedia.org/wiki/C.mmp

Carnegie Mellon has a retrospective on Gordon Bell that also mentions the project.

The only mention of Cm* I can find is in Gordon Bell's webpage at http://research.microsoft.com/en-us/um/people/gbell/gbvita.htm I think Cm* is just a later variation on the C.mmp concepts.

Oops, found it. The underlying operating system for the Carnegie Mellon projects was called Hydra. Go to http://www.cs.washington.edu/homes/levy/capabook/ and read chapter 6. At the end of chapter 6's PDF, there is a picture of the full wall size Cm*.

All very impressive for an early 70's project and largely defined a path for future computing development. I think the original PDP-11 based versions got scrapped a long time ago.

May 14th, 2011, 11:52 AM
I'm afraid the individuals who wrote the articles about CM and Hydra, were unaware of prior work done at Bell Laboratories for what would become the SAFEGUARD ABM system computers.

The Labs had evaluated up to 10 CPUs in a modular multiprocessor architecture with shared memory for a realtime processing system that attained 20 MIPS in trials.

Interestingly, one requirement for the system was that it be able to be maintained while in operation with CPU level board swaps etc.. Pretty revolutionary for any era. The machine includes faster than 7ns logic, LSI boards manufactured on "Cold Plates" and a rack structure which exceeds technology of the Cray XMP series, a decade later.
See SRMSC.org (http://www.srmsc.org) and the Full ABM R&D at Bell Labs (Project History) (http://www.srmsc.org/pdf/004438p0.pdf) or skip right to the Data Processing System (http://www.srmsc.org/pdf/004433p0.pdf) chapter.

There was also a website documenting other work done with up to [B]10 PDP-10 CPUs in a single system [not unlike CM's pre-Hydra concept] at around the same time as the CM work, but I have been unable to relocate it.

However, Hydra was one of the furthest multiprocessing evolutions of the PDP-11 architecture I'm aware of. It influenced both PDP-11/70mp and PDP-11/74 designs. I am unaware of any of these machines which survives today.

May 14th, 2011, 12:25 PM
Incidentally, if you're thinking, what I think, you're thinking... :rastarolleye: you will want to know that Technical Details and documentation of PDP-11/70mp and PDP-11/74 systems is available here (http://bitsavers.informatik.uni-stuttgart.de/pdf/dec/pdp11/1174/).


Note: The DEC Intro To Multiprocessing 1979 (http://bitsavers.informatik.uni-stuttgart.de/pdf/dec/pdp11/1174/Introduction_To_Multiprocessing_Jun79.pdf) references the earliest SMP they are aware of is a PDP-6 in 1964. They also mention a SAGE system with 2 CPUs in 1958 [this did not quite satisfy the definition of Multiprocessor] and state they were selling multiprocessor PDP-10s since 1972. They also claimed that "Hundreds" of customers had designed their own multiprocessor PDP-11 systems.

May 14th, 2011, 01:37 PM
.. Impressive ...

May 14th, 2011, 02:09 PM
DoD had been using mp systems since the late 1960s. Don't ask me how I know.

And let's not forget Illiac IV...

May 16th, 2011, 06:38 PM
DoD had been using mp systems since the late 1960s...

Absolutely true.

Quoting a subsequently Declassified, Top Secret 1972 report about Safeguard (http://www.gwu.edu/%7Ensarchiv/NSAEBB/NSAEBB36/04-04.htm) Development Status -

IV. Technical Progress

The research and development portion of the Safeguard
program is progressing satisfactorily. The prototype Missile Site
Radar (MSR) located at the Kwajalein Missle Range began radiating
power in September 1968 and has been operating since that time. It
has met or bettered all of it's design objectives and no serious
deficiencies have been found. Beginning in March 1969, check-out
of the MSR data processing system was initiated and successful opera-
tion of four data processing units working in parallel has since been
achieved. MSR software for the first part of the system test program
has been completed and installed. Beginning in July of 1969, tracking
of local targets was accomplished with the initial software and, in
December 1969, two ICBMs launched from Vandenberg AFB, California,
were successfully tracked.A final stage Multiprocessor system was demonstrated at Bell Labs Whippany, in April 1969. I know this to be true, because the software development for Safeguard was done in my home town.

Furthermore, Safeguard was an outgrowth of previous ABM programs. Bell Labs was involved as early as 1955 on studies and concepts that would lead to systems phases like NIKE-ZEUS, NIKE-X, SPARTAN which used less sophisticated processor concepts as far back as 1962 culminating in the first successful ICBM intercept in July of that year. The phrase "Hitting a bullet with a bullet" is used in the report. Based on that experience, Bell Labs realized a multiprocessor approach was required.

The uniqueness of SAFEGUARD is that in 1963, Bell Labs in cooperation with UNIVAC, undertook the task of creating such a data processing system using integrated circuits specially manufactured by Western Electric [ultimately named as Prime contractor] in direct opposition to expert opinion of the American Academy of Sciences who claimed such a system could not meet the required calculations per second (30 MIPS) or reliability needs, predicted by Bell Labs.

The proof of concept system, called PEPE (Parallel Element Processing Ensemble) - was built on an IBM 360/65 as a host computer "in the mid 60's". This "IC model" showed the feasibility of the Multiprocessing approach, Validating the use of more advanced large scale integrated circuits to be used in the final version.

Ultimately, the Safeguard System would exceed all requirements and become the world's first successful, Operational computer directed "Phased Array Radar" ABM system.