View Full Version : A V3 Version of our IDE/CF card S100 Board

May 16th, 2015, 03:27 PM
It's hard to believe but this board is now over 5 years old. It is probably our most popular S100 bus board to date. It went through two major revisions.
I would like to now introduce what will probably be the final version of this very useful S100 board. It’s called the V3 IDE/CF Card S100 board. The main updates are:-
• I did not want to change the basic 8255 driven circuit and all the software I and others have over the years written for the board. Sure if I were to do it all over again I would probably have done it different using perhaps a faster Zilog PIO or an onboard fast fully dedicated Z80 (as for our ZFDC board) or Propeller etc. The NEC or OKI 82C55-2’s are dirt common and seem to be able to handle anything the CPU sends to them.
• I want to hand lay down broad power traces to all the boards IC’s for more even power distribution – particularly to the power hungry HEX displays.
• I have inserted a trace “Keep out Area” on the front of the board so there is no danger of the IDE adaptors touching a critical trace.
• I have now switched to a “multi regular” voltage regulator footprint. This allows you to use either:- a 1.5Amp L7805CV, a TO-3 LM323K (3Amps), a Pololu 5 Volt , 2.5 Amp D24V25, or a EzSBC.com 3A regulator called PSU5.
• I did bend the no new changes rules a little and added two 22V10 GALs. This greatly simplifies the board and really speeds up the port addressing and the potential drive select/reset issues some were having. I realize not everybody is familiar with GAL’s. Please see here for more information about GALs. For those people and beginners I will supply the pre-programmed Lattice 22V10 GALs. The PALASM code is shown below. Again these GAL’s are fairly common (Jameco #39159 for the 15ns variety).
• Correct a potential drive A: or B: switch circuit problem described by some.
• I have added a wait state circuit (0 - 8 I/O wait states) to accommodate very fast S100 boards such as our 80386 and 80486 boards without requiring further generalized I/O wait states on the CPU board for other system I/O ports.
• People should be able to simply switch IC’s from their old board to this new one. Only two new GAL ICs and two 74LS373 are required.
• Last but least I relabeled much of the Silk Screen to be more relevant. For example placing IC numbers above their pin locations etc.

I have written up a description of the board here:-
(Bottom of the page).

This time I had 4 final productions boards made by PCBCart (China) before I announced it. That way I don’t have to worry about a large batch of boards coming back with a critical design flaw. The picture on the web site is the final board, not a prototype.

Anyway I will do a group order for a batch of these V3 bare boards. Please let me know ASAP if you would like one or more bare boards. They will run somewhere between $14 - $16 each + shipping. Note batches of these boards do/will not occur often. If you even think you will need such a board, now is the time.
It’s best to send me an e-mail direct (monahan AT vitasoft DOT org).

John Monahan