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pnr
September 27th, 2015, 08:26 AM
Hi All;

PNR, I am an old TI 990 fan, I worked with both the 990/10 and the 990/12 for many Years, Testing various boards that the company I worked for manufactured.. Was the 9995 what was used in the 990/10A ?? I don't Remember any more..

THANK YOU Marty

Nope, it was powered by its close cousin, the 99000. (Note 3 zeroes: the 9900 was an earlier, less capable chip). Exactly what chip from the 99xxx series is a bit unclear, every time I find a 990/10A owner the CPU chip has faded, unreadable markings. See for instance here for part of the quest for finding this answer:
http://atariage.com/forums/topic/241990-ot-ti99010a/
So far, I think they were powered by TMP99000B chips. How those differed from standard TMS99110 chips I don't know.

The 99000 is essentially a 9995 with a 16 bit bus and supervisor/user mode. Karl Guttag designed the 9995 in '79 and the 99000 in '80. Interestingly, both were made in TI's 5u "shrunk" process, which they had running properly as early as '77. Imagine the 99000 being released concurrently with the 8086!

Al Kossow
September 27th, 2015, 10:11 AM
Nope, it was powered by its close cousin, the 99000. (Note 3 zeroes: the 9900 was an earlier, less capable chip). Exactly what chip from the 99xxx series is a bit unclear, every time I find a 990/10A owner the CPU chip has faded, unreadable markings. See for instance here for part of the quest for finding this answer:
http://atariage.com/forums/topic/241990-ot-ti99010a/
So far, I think they were powered by TMP99000B chips. How those differed from standard TMS99110 chips I don't know.

The 99000 is essentially a 9995 with a 16 bit bus and supervisor/user mode. Karl Guttag designed the 9995 in '79 and the 99000 in '80. Interestingly, both were made in TI's 5u "shrunk" process, which they had running properly as early as '77. Imagine the 99000 being released concurrently with the 8086!

That's a name I haven't heard in a while.
Karl is a pretty influential guy. He was also responsible for VRAM and the 340x0 graphics processors.

Al Kossow
September 27th, 2015, 10:17 AM
Nope, it was powered by its close cousin, the 99000. (Note 3 zeroes: the 9900 was an earlier, less capable chip). Exactly what chip from the 99xxx series is a bit unclear, every time I find a 990/10A owner the CPU chip has faded, unreadable markings. See for instance here for part of the quest for finding this answer:
http://atariage.com/forums/topic/241990-ot-ti99010a/
So far, I think they were powered by TMP99000B chips. How those differed from standard TMS99110 chips I don't know.


http://bitsavers.org/pdf/ti/990/990-10/99010A_paper_Apr83.pdf says 99000

It was also used in the Business System 300


The 99110 may have been used in a later model of the 990-12 (990-12A?)
I'd have to do some more digging

Al Kossow
September 27th, 2015, 10:27 AM
The 99110 may have been used in a later model of the 990-12 (990-12A?)
I'd have to do some more digging

OK, hadn't looked at any of this in a LONG time. 105/110 was support for floating point according to the
Wikipedia page that references the data book I scanned. So I'm not sure what might have shipped with
the 110.

Chuck(G)
September 27th, 2015, 11:05 AM
There was also an I2L version of the 9900 chip as well, as I recall. Mostly for military/defense applications? Has anyone run across one in the wild?

commodorejohn
September 27th, 2015, 11:15 AM
Based on what I've read in the data book, the 99110 comes with floating-point routines in ROM mapped into the alternate trap-execution address space; the 99105 just has a bit of RAM there.

pnr
September 27th, 2015, 11:25 AM
I've been trying to get a definitive answer on the chip that powered the 990/10A for a while now, and so far I have found the following:

- The manuals for the 990/10A (and the later business system 300) say it was a TMS99000 chip. However, in other other manuals (notably the data book for the series) TI uses the term TMS99000 as a generic term for family members, a bit like saying "TMS99xxx". So, by this alone I'm not convinced. In the 99000 series there are two known members (the 99105 and the 99110). A third member, the 99120 was announced but apparently never released.

- I've found two TI990/10A systems. One (Dave Pitts's system) has a CPU chip with no markings at all. Of the other only a board photo remains, and the markings are hidden in glare, or smudged.

- The most obvious choice would be for the TI990/10A to be powered by a TMS99110, as its features are a match with those of a 990/10A, EXCEPT for the handling of the LDS/LDD instructions. The 99110 only has two memory map spaces, whereas the 990/10A has three, with the 3rd used with LDS/LDD. So far I have not seen a way to trick the 99110 into having 3 map spaces.

- The other option, i.e. the 99105 doesn't have the floating point routines, and the 99/10A CPU board does not seem to have off chip macrocode ROMs. It also does not have the LDS/LDD instructions at all; it could be that they are handled via the external processor interface, but I doubt it.

- I asked Karl Guttag about this. He does not recall that there ever was a special TI "in-house use only" version of the 99000. That said, he also mentioned that it was 35 years ago and he might have forgotten.

- Engineering samples marked TMP99000A and TMP99000B do exist, and the latter chip looks very much like the CPU chip on the photo of the 990/10A CPU board mentioned above. The date code on the known TMP99000B is from late 1983, while the regular 99105 and 99110 were available from late 1982. I think the 990/10A may have used a TMP99000. It would tie in with Karl Guttag's remark that the 99000 "worked on first silicon", the first CPU at TI to do so. TI have been known to use pre-release codes on released products (for example the TMX9909 disk controller).

All in all, I'm hoping that someone has a TI990/10A system with a CPU chip with legible markings (or a business system 300, for that matter) and that the question can be settled for good. Also, if it turns out that it is a TMS99000 chip or a TMP99000 chip, it remains intriguing what the differences with a 99110 chip are: just LDS/LDD or something more?

===

On the 990/12 CPU:

As far as I know there was only ever the discrete logic version of this CPU, although with a custom ALU bit slice (the 74S488 ). The CPU board comes in two versions, the original 990/12 and the later 990/12LR ("low radiation"). The 990/12LR board was also used in the business system 600 and 800.

pnr
September 29th, 2015, 02:10 PM
Here is an interesting write up about the 990/12 by the chief architect of the TI990 series:
http://ruizendp.websites.xs4all.nl/ti990_12.pdf

It has a very nice discussion of the design choices made and it made me realize something about the "registers in memory workspace" concept that I had missed earlier.

I suppose the workspace design is often criticized for being a drag on performance, and with a post-70's view it certainly is. The idea that memory would be as fast as registers just did not happen in the way the designers had envisaged. The idea of fast context switching only makes sense when the TI990 was used for process control, much like a TI960. Outside of that usage the benefit of a fast context switch is lost after 10 instructions or so. However, to the modern eye it looks worse than it was.

By the late 70's a major use for the TI990 was running Cobol programs. At that time Cobol (and Fortran) did not have support for recursive procedures: the local storage was not stack allocated, but had fixed memory allocations. In this pattern, each procedure (or 'performed' paragraph) would have its own workspace and be called with a BLWP. According to the article, Cobol code did a context switch every 30 instructions or so. Compare this to e.g. an IBM360 that had to perform a full registers Load/Store Multiple to a procedure save area on each context switch. For 1970's Cobol the "registers in memory workspace" concept was quite defensible.

Uniballer
September 29th, 2015, 04:01 PM
That article brings back a few memories for me. For quite some time my employer had a 990/12 and a PDP-11/44 in the same room. As I recall the CPU speed was roughly comparable. Once when the 990/12 broke down, Field Circus downgraded us to a 990/10. What a slow piece of crap that was.

I wrote some communication software that ran on a 990/5 that I stuck in the 990/12's TILINE backplane, and I wrote a DX10 driver to talk to it. As I recall, the "registers in memory" architecture worked great for interrupt handling.

Ksarul
September 29th, 2015, 04:35 PM
There was also an I2L version of the 9900 chip as well, as I recall. Mostly for military/defense applications? Has anyone run across one in the wild?

That would be the SBP9989. I have several of them that I bought from a seller in France a few years ago.

Chuck(G)
September 29th, 2015, 04:58 PM
Compare this to e.g. an IBM360 that had to perform a full registers Load/Store Multiple to a procedure save area on each context switch. For 1970's Cobol the "registers in memory workspace" concept was quite defensible.

I think, particularly for FORTRAN, the S/360 S-linkage convention was often observed more in the breach than in the observance. If one was writing a small subroutine, it was customary to save only the registers that the subroutine actually used.

For a twist, on the S-linkage, consider the CDC CYBER 200 with 256 64-bit registers. There, the instruction used, while similar to a LDM/STM was a register "swap", which saved a range of registers to memory, while loading a range of registers from memory. The length of the two ranges could be different, so you could, for example, save more registers than you loaded. Given the size of the register file, many programs with nothing but short arrays and scalars could be held entirely within the register file. Since the memory bus width was 512 bits and a 512 bit "super word" could be loaded or stored every machine cycle, it was comparatively efficient.

I never did like machines like the x86 with a small and somewhat non-orthogonal register file.

pnr
October 7th, 2015, 11:39 AM
Here are some brochures for the TI990 series from 1975. It would also seem to settle the question whether the 9900 processor was released in 1975 or 1976. The brochures have print dates (see small print at the bottom of the last page) of October to December 1975.

http://classic.technology/wp-content/uploads/2014/10/ti99010.pdf
http://classic.technology/wp-content/uploads/2014/10/9909900.pdf
http://classic.technology/wp-content/uploads/2014/09/ti990prototypingsystem.pdf
http://classic.technology/wp-content/uploads/2014/09/texasinstruments9904.pdf

Shouldn't these brochures be on bitsavers as well?