Image Map Image Map
View RSS Feed

Chuck(G)

Cloning a PAL/HAL (Part 6)

Rate this Entry
Part 5 of this series can be found here.

In the previous post, we discussed using Minilog to derive our GAL equations from PAL raw data.

We fed Minilog the following data:

Code:
table PAL10L8
  INPUT I9 I8 I7 I6 I5 I4 I3 I2 I1 I0 
  OUTPUT O7 O6 O5 O4 O3 O2 O1 O0 
  0000000000 00001011
  0000000001 00001011
  0000000010 00000010
  0000000011 00000010
  0000000100 00000011
  0000000101 00000011
  0000000110 00000010
  0000000111 00000010
  0000001000 00001001
  0000001001 00001001
  0000001010 00000000
  0000001011 00000000
  0000001100 00000001
  0000001101 00000001
  0000001110 00000000
  0000001111 00000000
  0000010000 00000011
  0000010001 00000011
  0000010010 00000010
  0000010011 00000010
  0000010100 00000011
  0000010101 00000011
  0000010110 00000010
  0000010111 00000010
  0000011000 00000001
...more stuff...
END
Running Minilog on this specifying equation output in sum-of-products form yields the following:

Code:
MINIMIZATION RESULT STATISTICS
==============================
FOUND 10 ESSENTIAL PRODUCT TERMS
MAXIMUM FANIN:                7
TOTAL LITERAL COUNT:          37
MAXIMUM PRODUCT TERM SIZE:    4
MAXIMUM OUTPUT FUNCTION SIZE: 2

INPUT SIGNAL  |  OUTPUT SIGNAL  REPRESENTATION

A : I9        F : I4            |       S : O7        X : O2
B : I8        G : I3            |       T : O6        Y : O1
C : I7        H : I2            |       U : O5        Z : O0
D : I6        I : I1            |       V : O4        
E : I5        J : I0            |       W : O3        

MINIMIZED EQUATIONS

S = CEI' + BC
T = BC + CF'I'
U = AB'HJ'
V = DI
W = F'H'I'
X = 0
Y = EH'I' + D'G'
Z = H'I' + B'I'
So there the equations are. Note that the equation for Bit 2 of the output is 0; meaning that the output pin isn't used.

GALs are normally programmed with a JEDEC-format file (.JED file), which is produced by a program that takes equations and other specifications and produces a fuse bitmap.

Since I'm using National Semi GAL16V8 chips, I'm going to use NS's EQN2JED compiler. It's an old DOS-mode tool and can be found here as part of the Opal package.

We need to massage the Minilog equations slightly to conform with EQN2JED syntax and add a few more bits and pieces to the compiler input file to specify pin assignments and devices. After a few minutes' work, we get the following equation (.EQN) file:

Code:
;	Equation file for AT&T 6300 display PL68 PAL.

CHIP PL68 16V8

;	Pin assignments.

i0=1 i1=2 i2=3 i3=4 i4=5 i5=6 i6=7 i7=8 i8=9 gnd=10
i9=11 o7=12 o6=13 o5=14 o4=15 o3=16 o2=17 o1=18 o0=19 vcc=20

EQUATIONS

/o7 = i7*i5*/i1 + i8*i7
/o6 = i8*i7 + i7*/i4*/i1
/o5 = i9*/i8*i2*/i0
/o4 = i6*i1
/o3 = /i4*/i2*/i1
; /o2 = 0    Don't care
/o1 = i5*/i2*/i1 + /i6*/i3
/o0 = /i2*/i1 + /i8*/i1
Run it into EQN2JED and you get several output files; a .JED file for your programmer and a .LOG file showing how things fit together:

Code:
QN2JED - Boolean Equations to JEDEC file assembler (Version V101)
Copyright (c) National Semiconductor Corporation 1990-1993

Log file for galgen.eqn
Device: 16V8

Pin   Label               Type
---   -----               ----
1     i0                  pos,com input
2     i1                  pos,com input
3     i2                  pos,com input
4     i3                  pos,com input
5     i4                  pos,com input
6     i5                  pos,com input
7     i6                  pos,com input
8     i7                  pos,com input
9     i8                  pos,com input
10    gnd                 ground pin
11    i9                  pos,com input
12    o7                  neg,com output
13    o6                  neg,com output
14    o5                  neg,com output
15    o4                  neg,com output
16    o3                  neg,com output
17    o2                  unused
18    o1                  neg,com output
19    o0                  neg,com output
20    vcc                 power pin

EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
Copyright (c) National Semiconductor Corporation 1990-1993

Device Utilization:

No of dedicated inputs used               : 10/10 (100.0%)
No of dedicated outputs used              :  2/2  (100.0%)
No of feedbacks used as dedicated outputs :  5/6  (83.3%)

		------------------------------------------
		Pin   Label                 Terms Usage
		------------------------------------------
		19    o0                    2/8   (25.0%)
		18    o1                    2/8   (25.0%)
		16    o3                    1/8   (12.5%)
		15    o4                    1/8   (12.5%)
		14    o5                    1/8   (12.5%)
		13    o6                    2/8   (25.0%)
		12    o7                    2/8   (25.0%)
		------------------------------------------
		Total Terms                11/64  (17.2%)
		------------------------------------------

EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
Copyright (c) National Semiconductor Corporation 1990-1993

                            Chip diagram (DIP)

                             ._____    _____.
                             |     \__/     |
                          i0 |  1        20 | vcc
                          i1 |  2        19 | o0
                          i2 |  3        18 | o1
                          i3 |  4        17 | o2
                          i4 |  5        16 | o3
                          i5 |  6        15 | o4
                          i6 |  7        14 | o5
                          i7 |  8        13 | o6
                          i8 |  9        12 | o7
                         gnd | 10        11 | i9
                             |______________|
So now we're ready to program the GAL...

See how it all turns out in part 7...

Submit "Cloning a PAL/HAL (Part 6)" to Digg Submit "Cloning a PAL/HAL (Part 6)" to del.icio.us Submit "Cloning a PAL/HAL (Part 6)" to StumbleUpon Submit "Cloning a PAL/HAL (Part 6)" to Google

Updated June 12th, 2019 at 10:47 PM by Chuck(G)

Tags: None Add / Edit Tags
Categories
Uncategorized

Comments

  1. Anonymous Coward's Avatar
    By chance, would your method work on PAL16L8BCN chips?

    For the last several years there have been a lot of people over at VOGONS and Quest Studios interested in cloning a chip like this used on the CMS/Game Blaster upgrade kit for the SoundBlaster 2.0. Apparently even though the upgrade was provided free (or for a very low price) from Creative Labs, very few people actually got the chips. While a number of people have talked about reverse engineering this chip for years, nobody seems to have the knowledge or tools to actually pull it off. I know a lot of people (including myself) who would be willing to buy.
  2. Anonymous Coward's Avatar
    By chance, would your method work on PAL16L8BCN chips?

    For the last several years there have been a lot of people over at VOGONS and Quest Studios interested in cloning a chip like this used on the CMS/Game Blaster upgrade kit for the SoundBlaster 2.0. Apparently even though the upgrade was provided free (or for a very low price) from Creative Labs, very few people actually got the chips. While a number of people have talked about reverse engineering this chip for years, nobody seems to have the knowledge or tools to actually pull it off. I know a lot of people (including myself) who would be willing to buy.
  3. Chuck(G)'s Avatar
    Quote Originally Posted by Anonymous Coward
    By chance, would your method work on PAL16L8BCN chips?
    With a few tweaks, I think yes. The 16L8 can still be emulated by a 16V8 GAL; the big difference is that there are feedback terms in the 16L8 which must be accounted for as well as the 3-state outputs. Some pins on the 16L8 can be programmed as either inputs or outputs, so you'd need to identify those.

    Schematics would help, but absent that, I'd be tempted to let a small C do the pin function identification. After that, the method would be approximately the same (get a truth table, have Minilog reduce it to equations and go from there).

    The best case would be if the distributor of the new 16L8s hasn't blown the privacy fuse. Then you'd just read the fuse map and convert it to something a GAL can use (Lattice used to have a tool to do that).

    But if the privacy fuses were blown, you'd first need to identify the inputs and outputs

    --Chuck
  4. Shadow Lord's Avatar
    AC,

    You and I are so on the same page on this. Now if I only understood most of what Chuck said.... Must be all those anatomy classes I took instead of computer engineering
  5. Anonymous Coward's Avatar
    I did EE and I understand a fair bit of what Chuck is saying, but I don't have the tools to pull it off.

    Maybe if we can have several dozen people sign a petition and make a donation we could get him to help us out.

    I would imagine just about everyone at VOGONS would be interested in one of these chips.
  6. Shadow Lord's Avatar
    I am definitely on board specially if I can get two of the chips! I guess the first thing is to get Chuck's opinion on this.