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  1. Replies
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    Most Apple machines from that era - especially...

    Most Apple machines from that era - especially the Quadras, Centris, and Performa machines - have notoriously leaky caps. If you have a dead machine of that type, first check the area around the...
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    Sorry for the delay. I'm at VCF-MW and it's been...

    Sorry for the delay. I'm at VCF-MW and it's been a long day. Still trying to get my talk ready for tomorrow. I can try and look at this if I have time tomorrow or Sunday. Otherwise will be...
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    No. Word transfers have to be word aligned -...

    No. Word transfers have to be word aligned - otherwise the BIU or the chipset breaks them apart.
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    ENIG will rub off in just a few insertions. I...

    ENIG will rub off in just a few insertions. I wouldn't bother. It has about the same endurance for fingers as HASL. Some discount board houses like pcbcart.com offer true hard gold (thicker...
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    481

    Looks like you are using something like a 27C1024...

    Looks like you are using something like a 27C1024 in a 40-pin DIP. Any reason on that over dual 8-bit parts? Just curious.
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    Was also used in the 3000NL I believe

    Was also used in the 3000NL I believe
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    Good point. Unless you wanted to do your own bus...

    Good point. Unless you wanted to do your own bus steering logic based on SBHE. It's probably not as complicated as it sounds - just a an extra 244/245 to route the high ROM to the lower data path...
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    I'm unclear on that as well. I don't have my...

    I'm unclear on that as well. I don't have my full test card built yet to empirically check it. Asserting ZWS# in addition to MEMCS16# would be a safe bet. You could even use the same tri-state or...
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    That clarifies it a little. But it seems the...

    That clarifies it a little. But it seems the problem is exactly how I stated it. The AST card is asserting MEMCS16# already for the designated lower memory segments - which disables the bus...
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    I'm trying to explain that you don't have to...

    I'm trying to explain that you don't have to qualify 16-bit on 128K boundaries. That's only for 0-wait. You can make a single word address 16-bit anywhere in lower ram just by asserting MEMCS16#...
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    I wouldn't say many. It's only true of cards...

    I wouldn't say many. It's only true of cards that are zero wait capable such as 16-bit XMS cards for a 286 like your Rampage. If you assert MEMCS16# early enough - before any of the memory strobes...
  12. The difficult part, as you calculated, is the...

    The difficult part, as you calculated, is the physical adaptation. Ironwood makes a lot of the socket adapters that are needed. But they are very expensive. Most hobbyists wont be able to solder...
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    It's a PCI+ISA standard. It uses the same...

    It's a PCI+ISA standard. It uses the same connectors as EISA except electrically incompatible. It was a precursor to the later PC-MIG industrial standards.
    ...
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    Not sure. That board has a PISA riser socket but...

    Not sure. That board has a PISA riser socket but any ISA card should work fine including an ISA riser.
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    That's a LPX board. They come around on eBay...

    That's a LPX board. They come around on eBay quite often. Prices vary.
  16. Didn't mean to give off that impression. I'm...

    Didn't mean to give off that impression. I'm lurking because the thread is an interesting read. Keep going! :)
  17. I don't know where you are coming from. Every...

    I don't know where you are coming from. Every time you read a word from the IDE data register at CS0/A=0, you get the next word in the sector. You read 256 times from the same IO address to...
  18. I don't know where you are coming from. Every...

    I don't know where you are coming from. Every time you read a word from the IDE data register at CS0/A=0, you get the next word in the sector. You read 256 times from the same IO address to...
  19. You don't have to rely on the CF card to do such...

    You don't have to rely on the CF card to do such things. JR-IDE maps the ATA/IDE register map into PC memory space just above the option BIOS and aliases the data register at 512 consecutive address...
  20. It is up to the chip set to handle this as there...

    It is up to the chip set to handle this as there is no size pin on the CPU itself. The chip set must both handle steering of the lower ISA byte to the upper CPU byte in the case of 8-bit odd address...
  21. That's pretty subjective. How can it be 'wrong'...

    That's pretty subjective. How can it be 'wrong' if it were done by design - including consideration of 4:3? 16:9 was a compromise between 4:3 and Panavision CinemaScope (2.35:1) producing similar...
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    I also ran U130 through LF and got the same...

    I also ran U130 through LF and got the same minimizations.


    IRQ13 = ERRORn' ;
    BUSY286n = 0;
    NPCSn = XA3' + INTAn' + CS287n + SMIO ;
    RESET287 = INTAn CS287n' SMIO' XIOWn' XA0 XA3' + RESET ;
    ...
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    Sigh... Minimized: ENDCYCn = RES0WS...

    Sigh...



    Minimized:


    ENDCYCn = RES0WS FSYS16' Q4' AIOW' IORn + RES0WS FSYS16' Q4' IOCS16 + RES0WS Q4' Q1' ;
    DMAAENn = AEN2n AEN1n ;
    GATE245 = AEN2n XA0' + AEN2n' AEN1n + FSYS16'...
  24. There are several projects (including some by...

    There are several projects (including some by forum members) that add an ESP8266 to a D-sub connector to create a modem emulator over WiFi. You could pair that with a hotspot running on your phone. ...
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    The more common IBM 128KB memory side-cars did...

    The more common IBM 128KB memory side-cars did use Dynamic RAM which would require refresh. But at least the video wasn't in contention. But even with 1, 2, or even 3 128KB side-cars, you wouldn't...
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