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Thread: Candidate for one of the worst predictions of the future...

  1. #21

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    Well, yes, it's not a small limit (the datasheets for the FRAM parts I have state 1 billion and 10^14 access cycles.) But it's still a limit - especially when you consider that FRAM's need for write-on-read means that it's not even just write cycles that wear like with flash memory. (Although I admit it's less of a limit when considered as mass storage than considered as main memory - where, at part #2's maximum operation speed of ~9MHz, you'd get maybe a week or so over four months' continuous usage before it would start failing.)
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  2. #22
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    Well, and that's just the point--great for non-volatile storage. In that light, you have to consider that a billion seconds is almost exactly 30 years. I haven't checked TI's performance figures for their FRAM-equipped MCUs. I suspect that simply backing the FRAM with regular static RAM (remember the Xicor NVRAMs?) would result in a nearly infinite life in an MCU application.

  3. #23

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    Yeah, I considered doing just that, but then I heard about MRAM and figured "why bother?" Implementing a whole separate SRAM cache system seems like an awful lot more work than just using a different type of nonvolatile memory, and suspect it wouldn't even be cheaper or anything.
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  4. #24
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    Well, if the claims about trillions of write cycles hold true.. then it's practically infinite even without cache. As for MRAM, it sounds interesting but I haven't found 'MRAM for dummies' yet (yes, TI really did make the 'FRAM for dummies' book I mentioned.. and shipped it for free. Via international FedEx!)

    -Tor

  5. #25

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    Quote Originally Posted by Tor View Post
    Well, if the claims about trillions of write cycles hold true.. then it's practically infinite even without cache.
    Not so, I'm afraid - because, like core memory of old, FRAM reads are destructive, so every read requires a write-back. The FRAM chips I've seen handle this transparently, but it still happens - so every access contributes to wear. So if you've got say, a 5MHz 6502 (which accesses memory on every cycle) running from an FRAM part rated for 10^14 (100 trillion) write cycles, you're going to start seeing failures in somewhere around 230 days of uptime - less than a year!

    Again, it is less of a limiting factor when you're only using it as mass storage, rather than main memory, but it's definitely non-negligible, no matter how large 10^14 looks on paper.
    Last edited by commodorejohn; May 15th, 2015 at 12:06 PM.
    Computers: Amiga 1200, DEC VAXStation 4000/60, DEC MicroPDP-11/73
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    "'Legacy code' often differs from its suggested alternative by actually working and scaling." - Bjarne Stroustrup

  6. #26
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    FRAM as replacement for flash seems to have a future (if, and only if capacity increases). I agree it's not a DRAM replacement. But maybe for something semi-mass storage-like, and NVRAM. It would probably have been good for the last generation NVRAM-based Palm PDAs.. let's hope the tech isn't too little, too late.

    -Tor

  7. #27
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    Even fuse-link bipolar PROMs have been known to have bit rot.

    I don't expect much in the way of electronic memory devices, save core rope to survive for long into the next century.

  8. #28

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    Or the oft- neglected bubble memory.

  9. #29
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    Sounds a bit like the ancient NMOS (later CMOS) Xicor NOVRAM--SRAM overlaying EEPROM. Stores were fairly limited to >100K (depends on version) but all specified data retention as greater than 100 years. Not much storage, but you could find them all over the place, from an Intel Aboveboard to generations of NICs. Really useful and inexpensive. An early part would be the X2444.

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