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Thread: PDP SBC - J11 Hack

  1. #1

    Default PDP SBC - J11 Hack

    Hi All,

    I've been playing around with a J11 processor chip on a breadboard. Several years ago I ran upon the J11 hack website and have been intrigued ever since. For those of you not families with the site you can find it here:

    http://www.cs.ubc.ca/~hilpert/e/pdp11hack/index.html

    I found a J11 on ebay a month ago and thought I would see if the chip was functional. At the bottom of the J11 hack site is a link to a J11 hack built by Peter Schranz that incorporated all of the glue logic in a GAL. I am taking that approach.

    To date I have the J11 running and interfaced to 128k words of Ram and a single serial port. I'm running it with a 12Mhz crystal, I'll pop in a faster xtal when I get time. For testing I have been using PDPGUI to drop in little test programs that I assemble using the GCC assembler built for the PDP11. I also have a working PDP11/83 that I can test against. So far have successfully run the simple test programs from the J11 Hack site. I've also written a small program that sets up and tests the MMU, that test worked.

    My version also includes the power up register which can be used to configure boot from ROM at several locations.

    I'm in the process of wiring up the second version that splits the GAL logic into two chips. One for memory addressing and the other for I/O. This next version decodes the upper 5 address bits and creates 32 blocks of 128k memory select, of which I am getting 6 select lines out of the GAL. The I/O GAL provides logic to partially decode 2 serial ports, parallel port space, and the boot ROM at 173000 in I/O space. I should have the wired by tonight and start testing again.

    My immediate goal is to build a little SBC for a clock. You can see my previous projects at http://chronworks.com

    In any case there has been others express interest in a J11 SBC that is more extensive and possibly capable of running RT11. I am planning to publish everything I'm doing and am open to incorporating additions. Once I get the ROM working and testing I'll post what I have, probably early next week. Overall I'm trying to keep the SBC reasonably simple. Input as to the HW base necessary to support RT11 would be helpful at this point. Please feel free to bring your thoughts and suggestions into this thread.

    Cheers

    len

  2. #2
    Join Date
    Oct 2011
    Location
    Bedford, NH, USA
    Posts
    1,305

    Default

    Excellent!

    I will be watching with great interest.
    Thanks for the pointer to the original J-11 hack site. Your web site is pretty interesting, too!

    smp

  3. #3
    Join Date
    Dec 2010
    Location
    Seattle, WA
    Posts
    1,456

    Default

    If your ultimate goal is to run RT-11 what would you do for mass storage? What would it take to build logic that is functionally compatible with something like an RXV21 controller at the register interface level, and use some sort of flash for storage?

    I have two or three M8192 KDJ11-A modules which are functional enough to boot XXDP but fail some of the diagnostics. I wonder how likely it is that the J-11 chip itself has issues vs. other components on the module. Maybe someday I'll pull one of the J-11 chips and try experimenting with a single board J-11 hack.

  4. #4
    Join Date
    Mar 2007
    Location
    Leicester, UK
    Posts
    157

    Default

    Hi Len,

    That's a very interesting project ad thanks for bringing the hacks site to our attention. I wasn't aware of it before.

    Please keep posting updates.


    Cheers,

    Andy.

  5. #5

    Default

    Hi

    My original intentions were a bit simpler. The rt11 idea came from another user. Since I'm in the starting phase of the project I'm completely open to ideas.

    Len


    Quote Originally Posted by gslick View Post
    If your ultimate goal is to run RT-11 what would you do for mass storage? What would it take to build logic that is functionally compatible with something like an RXV21 controller at the register interface level, and use some sort of flash for storage?

    I have two or three M8192 KDJ11-A modules which are functional enough to boot XXDP but fail some of the diagnostics. I wonder how likely it is that the J-11 chip itself has issues vs. other components on the module. Maybe someday I'll pull one of the J-11 chips and try experimenting with a single board J-11 hack.

  6. #6

    Default

    RT-11 SBC with magnetic mass storage would be extremely tempting

  7. #7
    Join Date
    Jun 2012
    Location
    UK - Worcester
    Posts
    1,309

    Default

    Nice 'little' project. I would be interested in helping out.

    The first things that come to mind are:

    The schematics currently address the RAM as WORDS. If you are writing your own embedded firmware - and don't plan to use the BYTE-based instructions - this is fine. If you plan to use (say) RT-11 - the memory will have to support both BYTE and WORD reads/writes. You will also have to get a bit more memory on the board... SRAM is fairly cheap and available in large byte-wide devices these days so this shouldn't be a problem.

    Disk wise I would consider adding a simple parallel port to drive a compact flash (or similar) as an IDE interface. This will not be the same as any 'standard' DEC controller - but I am sure an RT-11 driver could be put together using the RT-11 distribution kit and SIMH. Thoughts anyone?

    You could 'borrow' the IDE disk interface from the PDP-8/E SBC6120 retrobrew project (see https://www.retrobrewcomputers.org/l...n-1.10-sch.pdf - in particular schematic 3 of 6, devices U18 and U24 and connector J2).

    Dave
    Last edited by daver2; October 27th, 2016 at 02:13 AM.

  8. #8
    Join Date
    Dec 2010
    Location
    Seattle, WA
    Posts
    1,456

    Default

    If you want to stick with DIP parts for now for breadboard work you can get AS6C4008-55PCN 512Kx8 SRAM parts in 32-pin DIP packages for less than $5 each new. With two of those you'd have 1MB of SRAM and should be able to run just about anything.

  9. #9

    Default

    Perfect, both Digikey and Mouser has these for 4.57/4.56. THanks for the tip.

    Quote Originally Posted by gslick View Post
    If you want to stick with DIP parts for now for breadboard work you can get AS6C4008-55PCN 512Kx8 SRAM parts in 32-pin DIP packages for less than $5 each new. With two of those you'd have 1MB of SRAM and should be able to run just about anything.

  10. #10

    Default

    Help me understand byte write.

    In the J11 processor manual I can see that a AIO of 0011 is a byte write. Ok, no problem to decode that and spit the /WE signal. I'm just not understanding how the odd/even address correlate to the byte? (even address low byte, odd address high byte. ) I guess I need to spend some time with a schematic of a memory board.

    I'll look at the 6120 Ide interface. I have a CF disk on my Z80 SBC that runs CPM. That was fairly simple, although I did not design the driver. I have parallel space set aside at 176160 where I was planning to throw in a couple 8255's.

    I haven't looked at the source for the disk drivers. On my 11/83 I have a DU device. (RA82) I am using a UC07 with a SCSI2SD on the other end. Maybe I'm being naive, but I assume that the drive API provides stand calls and isolates the controller and drive. Writing code to replace anything lower than the API makes sense, at least here at 30,000ft. I assume that the drive needs dma to get the data into the memory direct from disk.

    Those of higher knowledge please comment.

    len




    Quote Originally Posted by daver2 View Post
    Nice 'little' project. I would be interested in helping out.

    The first things that come to mind are:

    The schematics currently address the RAM as WORDS. If you are writing your own embedded firmware - and don't plan to use the BYTE-based instructions - this is fine. If you plan to use (say) RT-11 - the memory will have to support both BYTE and WORD reads/writes. You will also have to get a bit more memory on the board... SRAM is fairly cheap and available in large byte-wide devices these days so this shouldn't be a problem.

    Disk wise I would consider adding a simple parallel port to drive a compact flash (or similar) as an IDE interface. This will not be the same as any 'standard' DEC controller - but I am sure an RT-11 driver could be put together using the RT-11 distribution kit and SIMH. Thoughts anyone?

    You could 'borrow' the IDE disk interface from the PDP-8/E SBC6120 retrobrew project (see https://www.retrobrewcomputers.org/l...n-1.10-sch.pdf - in particular schematic 3 of 6, devices U18 and U24 and connector J2).

    Dave

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