Image Map Image Map
Results 1 to 2 of 2

Thread: Block Mode DMA Capable Memory

  1. #1

    Default Block Mode DMA Capable Memory

    I was wondering about Block Mode DMA:

    First thing I'm not sure do the RQDX3 or UC07 require Memory that is block mode capable or do they learn from the missing assertion of BREF that they should not do block mode DMAs?

    Also I did not find to much information about block mode DMA, the only real information I found was in a Micronote that explains the handshaking. It is clear the memory then needs some sort of autoincrement for the memory address. But how much of the memory address must be incremented? In one sentence it is mentioned that a block mode DMA must not cross a 16 word boundary, which then let me think that only address bits A1..A4 are autoincremented on the memory and the remark regarding 16 word boundary let me assume that the carry is ignored or in other words something like a 4-bit binary counter with preset would do the job. Is this correct and does someone have more information regarding block mode DMA?

    Peter

  2. #2
    Join Date
    Nov 2014
    Location
    Chicagoland
    Posts
    119

    Default

    Quote Originally Posted by cbscpe View Post
    I was wondering about Block Mode DMA:

    First thing I'm not sure do the RQDX3 or UC07 require Memory that is block mode capable or do they learn from the missing assertion of BREF that they should not do block mode DMAs?
    If both devices (memory and controller) do not support block mode, then regular DMA is used. They do look for BREF, so systems with a mix of both regular and block memory can take advantage of it for the latter.

    Also I did not find to much information about block mode DMA, the only real information I found was in a Micronote that explains the handshaking. It is clear the memory then needs some sort of autoincrement for the memory address. But how much of the memory address must be incremented? In one sentence it is mentioned that a block mode DMA must not cross a 16 word boundary, which then let me think that only address bits A1..A4 are autoincremented on the memory and the remark regarding 16 word boundary let me assume that the carry is ignored or in other words something like a 4-bit binary counter with preset would do the job. Is this correct and does someone have more information regarding block mode DMA?
    The manual EK-MSV1Q-UG-002_MSV11Q has similiar content to the Micronotes. If the transfer ties to cross a 16 word boundary, then the block mode ends (see page 57). I suspect this is the method used avoid hogging the bus and/or minimizes the parts count.

    If you can find a copy of MP01931 it might answer your other questions.


    Jerry

Bookmarks

Posting Permissions

  • You may not post new threads
  • You may not post replies
  • You may not post attachments
  • You may not edit your posts
  •