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Thread: DC319 in VHDL - any interest?

  1. #1
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    Default DC319 in VHDL - any interest?

    Hi DEC Forum Folks,

    As a part of my earlier posted "World's Fastest Real DCJ11" project I recently realized that I needed a few DL software compatible serial ports, so I re-investigated the once prolific DC319 that I designed into numerous products way back when. Although I have a few dusty ones laying around, I have been working on a plug-in replacement using one or more Lattice Mach4000 series devices as they seem to be the only ones still in production and widely available in a small form factor with +5V tolerant I/O. I should mention that my VHDL code is as generic as I can make it so, in the future, it can be ported to other devices.

    The initial goal has been to create a small board in the 40-pin DIP format that simply plugs into a DC319 socket like the real thing and works exactly the same. So far I have the design and the VHDL coding complete ready for simulation and testing on a real board to be produced shortly. It uses 3 of the LC4064V parts in the 44-pin QFP package (about $3 US each from Digikey or Mouser) which function as follows: Transmitter with DAL00-08 interface, Receiver with DAL08-15 interface and a Clock Generator. The 3 parts and clock oscillators fit snugly on the 0.7" X 2.1" DIP socket footprint. My only other choice was to incorporate the design into a single part, but it would have to be a tiny BGA dictating multiple layers, in order to fit the footprint. This is a no-go in my opinion as we're all now just hobbyists (I presume).

    So, the reason for my post is simply to see if there are ones among you that think the availability of the DC319 in synthesizable VHDL would be of interest - Open Source of course. I'm writing the code in modules which can be used in a larger part like the LC42128 in a 144-pin QFP should the functionality, not the 40-DIP footprint, is of importance.

    I should note that the DC319 has a number of weird quirks by today's thinking, of which most are easy to simulate and test. However, the DC319 was capable of operating in 8-bit mode, which I can only simulate, having no hardware (T-11 for example) to plug it into. If someone with an 8-bit DC-319 socket would like to try it out let me know. Obviously, no hurry.

    Any interest from anyone? Questions, comments, suggestions welcome. Also, before someone says "Keyways says they have DC319's....", I know. That's not the point.

    -Ken

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    Hi Ken,

    when I was building my DCJ11 based PDP-11 I had the same requirement for DLV11 compatible serial ports. However I took a completely different approach. I used a CPLD to interface the bus with a CDP6402 UART as the console, and later I used a CPLD to interface the bus with a microcontroller that had 4 UARTs to emulate a DLV11J. This was much more convenient. In any case when you are going to build "World's Fastest Real DCJ11" system you will have to build everything from the scratch. So a 40-pin drop-in replacement for a DC319 is less useful than a full implementation, let's say, of a DLV11J in one CPLD. However I have looked at the price tag of the larger MACH 4000 (those with 256 or 512MC which is certainly required if you implement 4 UARTs). They are rather expensive. I would say a small CPLD which interfaces with four CDP6402 or equivalent UARTs, that support up to 115200baud, would be cheaper. You can use a ATF1508 which is not as fast as a MACH 4000, but is a real 5V device and would be even available in PLCC-84. I would actually prefer a solution that emulates a DHQ11.

    Peter


    P.S.: I throw in my PDP-11 Hack to the competition of the fastest DCJ11 system, currently running at 22.1184MHz and all RAM read is handled within 4 clock cycles and RAM write in 8 clock cycles, in other the shortest possible.

  3. #3

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    Yes, please let us know when you have it working, examples of VHDL code are always useful. I just bought a Diligent board to use for various emulation and interfacing purposes to learn more about VHDL and Verilog.

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    Hello Peter,
    The work you've done on your system is indeed impressive and your choice of implementation of "DL" serial interfaces is clever. My goal with the DC319 VHDL, however, is to be able to first produce a plug-compatible DIP of the original, a "DC319-DIP". This will yield tested code that can be implemented in, realistically, almost any flavor of CPLD or FPGA and make it available for use or reference by anyone with an interest in doing so.

    The DC319-DIP, hopefully, will work on any DEC processor that has a socket for a DLART. Thus, it has to have +5 volt operation. For others, like you and I, that are working from scratch on a DEC processor of some sort, any modern FPGA with enough resources can work. Also, the code can be stripped down to the bare "DL" compatibility and instantiated as many times as desired to build complete DLV11-J's on a chip for example.

    You're much farther along on your design than I am, but perhaps we can meet for a challenge at a future VCFED event!

    -Ken
    Last edited by kenwickvs; June 8th, 2018 at 05:37 AM.

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    Hi Cruff,
    I'm glad to see your interest in FPGA technology. It's amazing how much affordable logic you can get nowdays. You could most likely instantiate a lot of DL ports in your Digilent board.
    -Ken

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    Hi Ken,

    if you want to interface to legacy logic you need to have 5V compatibility. So FPGA's are ruled out, there aren't any in the meantime. I think FPGA's are interesting if you want to emulate a complete system, like the one here https://pdp2011.sytse.net/wordpress/pdp-11/ The MACH 4000 are CPLDs and as such have only a limited set of resources. I once tried to implement a UART in a ATF1508 with 128 Logic cells and it required 71 logic cells. In other words a MACH 4000 with 512 logic cells should be able to emulate a complete DLV11J. In other words, yes I would be very interested to see the VHDL code for a DLV11. I could really use a DLV11J for my system with just a MACH 4000 (albeit it would be a TQFP-144 case, never done this, but should not be really more difficult than a TQFP-100). Especially as CPLDs have the instant on feature and do not require any support logic, like clock, EEPROM etc. My DLV11J implementation requires a bus cycle of 4-5 usec for each CSR read or write. A DLV11J in a CPLD would be much faster.

    Ouch, I just tried to find out more about MACH 4000. The ones with 512 Macrocells use at least a TQFP-176 and are 60USD each......

    Peter

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    Peter,
    I think the approach to doing a 4, 8 or more port DL compatible design is to choose a modern and cheap FPGA as there are a lot of choices from multiple manufacturers, including Lattice, each with tons of logic cells. There are a lot of ways to meet the voltage translation from +5 to +3.3 or +2.5. TI, for one, has a portfolio of parts designed for that as you probably know.

    My approach to the Fast DCJ11 design is to immediately translate to +3.3V and use FPGA's for the function decode and board/bus interface logic as well as a DLV11J-equivalent 4 port serial. Then go +3.3V to +5 for the QBus. I'm also toying with emulating a drive controller of some type (RLV12 maybe) using a CF card based on the great work that Reinhard did. I think we all enjoyed that project last year

    As far as my VHDL code, I'm trying to make it easy to strip out all extra functionality needed for the DC319 and get back to a basic DL compatible port which can simply be instantiated as necessary in a FPGA. For those that don't know, the DC319 provided a superset of DL features like software programmable baud rates and interrupt clocks of 50 Hz, 60 Hz, 800 Hz and 76.8 KHz as well as byte access. The DL is much simpler.

    It's funny about Lattice. The 3x lc4064 parts in the DC319-DIP are only $3.00 each. You're right about the large ispMACH parts being outrageously expensive. I think that's an intended deterrent for folks to use them for new designs, but it does severely penalize the poor company that's trying to keep an old product going that refuses to die.

    -Ken

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    Hi Ken,

    Yeah TI has tons of level converters. Do you have already one in mind to interface 3V3 to QBUS? I was also thinking of using Level Converters so I could use the XMega (faster and more UART but only 3V3) and interface it with the QBUS but did not find anything reasonable. Such an interface would also be useful to connect some of this very nice, cheap and tiny FPGAs from Lattice (ICE40, MACHXO) with non-volatile configuration. That would make quite a universal Q-Bus Card so you can emulate whatever you want (DLV11, RLV12, or perhaps even a RH11 for my upcoming 11/94 clone).

    Peter

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    Hi Peter,

    I'm just getting back on the DCJ11 design, so I haven't picked out level converters just yet. It's most likely an issue with space, manual soldering, etc. Interesting that you are considering the Actel XMega. I have used the 32E5 on a number of designs in the last couple of years, and completed a port of FreeRTOS for it for a machine controller. I am interested in using either a soft core in an FPGA or an FPGA with a hard silicone in my PDP design for the ability to emulate DEC hardware as you indicated. That's the problem with this "hobby" - too many opportunities to reinvent the wheel.

    -Ken

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    Hi Ken,

    I'm considering using the 128A1U, as it has 8 USARTs, to build a dual DLV-11J. But so far my designs are pure 5V designs and I use "legacy" bus interface devices like the DC005, the 7438 and the DS8837. The next board I'm going to build is a Q-Bus Version of the RLV12/Hack. Still using a 5V MCU.

    I know that FPGA are very capable but I stick with the combo of small FPGA or CPLD and a microcontroller. I don't think this is a real break with the traditional interface designs, except for some simple interfaces like the serial interfaces and multiplexors. But the rest of the controllers all have some sort of microcontroller many 3rd party designs use the AM2901 bit-slices. The RLV11 uses AM2911. Later DEC designs used a T11 (RQDX) or a 68000 (DELQA) and ASICs. So using a combo is pretty close to the original setting.

    I don't quite understand your concerns for a DCJ11 board. If I can fit a PDP-11/73A (at least RT-11 thinks so) with 2Mbyte of RAM on a 10x12cm PCB then a dual-width Q-Bus card has plenty of room, even if you are using clumsy bus-interface logic as do the original DEC CPU boards. When I was looking at the schematic of a KDJ11A CPU board I estimated that each ASIC has about the complexity of a ATF1508. With large SRAMS (a CY62177ESL-55ZXI would be perfect) you can omit all the cache logic and replace the cache RAM with a single 2Mx16 SRAM at much less PCB space. DMA logic would also be greatly simplified as your board is CPU and Memory at the same time and in stead of invalidating a cache location you just need to update the memory. I did not include all features of a KDJ11A so a single ATF1508 was all I needed for the GLUE logic.

    Peter

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