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Thread: DC319 in VHDL - any interest?

  1. #11
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    Hi Peter,
    Quote Originally Posted by cbscpe View Post
    I know that FPGA are very capable but I stick with the combo of small FPGA or CPLD and a microcontroller.
    Funny, I was just looking at the schematics for a DCJ11-based SBC I designed way back in 1990. It used many Lattice GAL devices from 16V8 to 22V10 and it worked great. Your approach not to use an FPGA, makes perfect sense to me. In fact, my DC319-DIP uses 3x 4064s but i think it will fit totally in 1x 4256. But a 48-pin QFP is the only package, non bga, that will fit within the 0.600" pin spacing of a 40-pin DIP (and just barely).
    Quote Originally Posted by cbscpe View Post
    I don't quite understand your concerns for a DCJ11 board.
    I'm not sure what concerns you are referring to. There's a ton of real estate on a Dual Qbus board that, with today's technology, can way "over-feature" anything DEC had back in the day on a Quad board. My design goal, just for fun, is to produce a DCJ11-based Qbus card, thus my "Real" nomenclature, and see how fast it can go. Not at all unlike what you are doing.

    Keep up the good work!

    -Ken

  2. #12
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    It's most likely an issue with space, manual soldering, etc.
    this was the remark which I referred to as your concern. Not sure what you meant by this.

    Here a small teaser of my current work .
    top.jpg
    In fact it is a universal design, it has a generic read/write CSR interface, can perform DMA and can interrupt the CPU. The challenge is the software of the AVR MCU. In theory it should be able to even emulate MSCP. But I just learned about Emulex SC03/BX which emulates a RH70 on a Q-Bus and I'm reading the manual, might be easier to emulate than a MSCP.

    Peter

  3. #13
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    Nice work, Peter. Which AVR uP have you chosen?
    -Ken

  4. #14
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    Im using a Atmega1284P, it has a large Flash (128k) and a very large SRAM (16k, the largest among all AVR). The RLV12 core itself only needs little Flash and RAM (about 4k flash and 1k RAM is enough), but I have added a lot of debugging and support routines during the development, a FAT32-library optimized for speed (needs quite some RAM) is also included as at the end I want to use disk image files for the RL01/02 volumes and also added a user interface, which requires 32k of flash and 12k of RAM (however 8k RAM are reserved for the debugging log). The rest you see is the CPLD and the bus interface and of course I needed a level shifter to interface the AVR to the SD-Card (CD4050)

    Peter

    Peter

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