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Thread: 30pin simm memory bottlenecks with faster 486 processors?

  1. #11
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    Quote Originally Posted by computerdude92 View Post
    In that case, GiGaBiTe, when was the performance cut-off? Would a DX2 66 feel bottlenecked by 30pin memory, even if it is 80ns or 70ns speed? Keeping in mind the DX2 66 has the same bus speed as a DX33. Sorry, I don't mean to throw you under the bus, krebizfan.
    SIMM memory is always going to be a bottleneck because it's slower than the bus. Unlike later SDRAM, FPM and EDO operate asynchronously, so the CPU is usually wasting lots of cycles just waiting for information. Cache usually gives a good perf boost because SRAM operates at the FSB speed. The trouble is always finding those TAG SRAM chips..

    A 50ns SIMM runs about 20 MHz, so a DX/25 would already be bottlenecked. Some motherboards have options to do bank interleaving, which gives a small performance boost.

    Quote Originally Posted by Stone View Post
    I dunno...

    I have lots of 30 pin SIMMs and plenty of them are 70ns.

    I also have some that are 60ns.
    I have a small pile of 30 pin SIMMs and the speeds are all over the map. 150, 120, 80 and just one 70ns module.

    The faster memory modules in both 30/72 pin varieties were always more expensive, like every memory standard since and tended to be more scarce.

  2. #12

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    Quote Originally Posted by computerdude92 View Post
    I thought 5x86-133 was actually as fast as the 50MHz bus Pentium 75... The Pentium 90 has an even better 60MHz bus, so I find it odd that you say the 5x86-133 is faster, but wait, you meant it feels faster clock per clock even though it is a slower chip in MHz than the P90.
    Notice I mentioned the 50mhz FSB -- with that you can safely take it to 150mhz (x3 internal) at which point the faster opcodes make up for the slightly slower bus, bringing it up to P90 performance... at least for most standard operations.

    Though Pentium does leap ahead on anything FPU related across the board... at least on performance. But as we all know, in terms of accuracy, well...
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  3. #13

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    Quote Originally Posted by computerdude92 View Post
    In that case, GiGaBiTe, when was the performance cut-off? Would a DX2 66 feel bottlenecked by 30pin memory, even if it is 80ns or 70ns speed?.
    No, it's still the same damned memory accessed across the same width bus. Just because the wiring is arranged to use more sticks doesn't mean the ACTUAL wiring/layout to the chips and resultant bus width of memory access is ANY different!
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  4. #14
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    Quote Originally Posted by deathshadow View Post
    Notice I mentioned the 50mhz FSB -- with that you can safely take it to 150mhz (x3 internal) at which point the faster opcodes make up for the slightly slower bus, bringing it up to P90 performance... at least for most standard operations.
    While an Am5x86-133 may have run fine at 150 MHz, most 486 boards didn't tolerate a 50 MHz bus. Most people would run 40x4 for 160 MHz and it'd be pretty stable. I have three Am5x86-133 and they run fine at 160 MHz all day when cooled properly.

    Quote Originally Posted by deathshadow View Post
    Though Pentium does leap ahead on anything FPU related across the board... at least on performance. But as we all know, in terms of accuracy, well...
    There were only a handful of Pentiums which had the FDIV bug, and the 75 MHz desktop model wasn't one of them. By far the worst affected model is the Pentium 90, which most core revisions of it had the bug.

  5. #15

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    Quote Originally Posted by GiGaBiTe View Post
    While an Am5x86-133 may have run fine at 150 MHz, most 486 boards didn't tolerate a 50 MHz bus
    Which I mentioned in the first bloody post. In fact internal documents suggested the 5x86-133 P75 and 5x86-150 P75 plus were the same exact chip, but they choose not to sell the latter in numbers BECAUSE so many mainboards didn't support it.

    Quote Originally Posted by deathshadow View Post
    with a 50mhz capable mainboard and ram at 3x.
    Finding the boards that work is "fun", though I've come across quite a few as by the time PCI slots were a 'norm' so were multiple voltage and clock controls. Most boards with EISA slots also supported it since the DX50 was so popular in the server world, since servers spend more time shoving data around than doing hard processing... even though the EISA bus only ran at 8.33mhz it still provided that boost when the CPU was shoving stuff from EISA to RAM and back. If it has PCI or EISA and is a OEM board you've got a pretty good shot. If it's a Dell or Packard Hell desktop, you're probably shit outta luck!

    Kind of like how most RAM ran with wait states as even the fastest 50ns RAM couldn't do 33mhz, much less 50 -- but you have to account for the handshaking overhead too.

    Precursor to today where memory has all sorts of crazy timings.
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  6. #16

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    Quote Originally Posted by deathshadow View Post
    No, it's still the same damned memory accessed across the same width bus. Just because the wiring is arranged to use more sticks doesn't mean the ACTUAL wiring/layout to the chips and resultant bus width of memory access is ANY different!
    Oh, I thought 30pin simms were slower than the 72pin variants, other than just the wiring being different to allow more sticks. Ignoring EDO ram, cause 486's used FPM.
    Last edited by computerdude92; July 18th, 2018 at 07:53 PM.

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