Image Map Image Map
Page 2 of 2 FirstFirst 12
Results 11 to 15 of 15

Thread: Sweet score for my collection

  1. #11

    Default

    Thank you very much!

  2. #12

    Default

    Quote Originally Posted by NF6X View Post
    Thank you very much!
    From the schematic, the power supply looks like a linear. It is an early design of a switcher that is very dependent on the size if the output capacitors. The schematic says that the +5 filter cap is 6,000 uF. It actually needs to be bigger than 6,000 uF for the switcher to work. I think that DEC was depending on the -20%/+80% tolerance on the capacitance to yield the capacitance that they needed without paying for a larger capacitor.
    Member of the Rhode Island Computer Museum
    http://www.ricomputermuseum.org

  3. #13

    Default

    Interesting. It sounds like I might consider putting in a somewhat higher value if there are issues with the bulk capacitors in mine and they can't be suitably reformed. Available capacitance per unit volume for electrolytic capacitors has increased quite a bit since the PDP-8/M's day, so that probably wouldn't be much of a problem. It'll be interesting to study the simulation to learn more about how it all works.

  4. #14

    Default

    Quote Originally Posted by NF6X View Post
    Interesting. It sounds like I might consider putting in a somewhat higher value if there are issues with the bulk capacitors in mine and they can't be suitably reformed. Available capacitance per unit volume for electrolytic capacitors has increased quite a bit since the PDP-8/M's day, so that probably wouldn't be much of a problem. It'll be interesting to study the simulation to learn more about how it all works.
    The difficult part about substituting a modern capacitor is the spacing between the screw terminals where the capacitor attaches to the PCB.
    There is also an ECO for the power supply where bus bars were added to the PCB to prevent it from burning under high load.

    When you run the simulation you will see lots of pulses from the +5V to charge the output cap at startup. After startup the simulation increases and decreases the load. You will see the resulting changes in the pulse frequency to accommodate the load.
    Member of the Rhode Island Computer Museum
    http://www.ricomputermuseum.org

  5. #15
    Join Date
    Mar 2006
    Location
    Salt Lake City, UT, USA
    Posts
    166

    Default

    Quote Originally Posted by m_thompson View Post
    We made an LT-Spice simulation of the whole power supply so we could understand how it works.
    You should upload that to github!

Bookmarks

Posting Permissions

  • You may not post new threads
  • You may not post replies
  • You may not post attachments
  • You may not edit your posts
  •