Finally got my MCM/70

[daver2]

Today horse racing - tomorrow STARTREK on one line!

It would be good to get some photographs of how the cards are cabled together at some point when you have a spare minute or ten. I think I have worked it out from the cards though as follows:

The RAM and ROM cards are connected together and to CPU/J3 via 2*20 way ribbon cable.

The I/O card is connected to CPU/J2 via 2*20 way ribbon cable.

The two 2*13 way connectors on the I/O card are connected to the two tape drives - one to each.

The connector 'on its own' on the I/O card is connected to the outside world via the rear of the case.

The two 2*10 way ribbon cables on the CPU card (J1 and J4) are connected to the keyboard and the display (not sure which way round though) - but I am going to hazard a guess that J1 is the keyboard and J4 is the display (based on the number of connections to the connectors).

Dave

[daver2]

Time to make some inroads on the ROM card before tea...

I can see 3 * 74155 dual 2 to 4 decoders and a hex latch. I am going to start with these decoders first. I suspect the 74175 hex latch is something to do with the memory paging.

Dave

[daver2]

Correction - the 74175 is a quadruple latch with active high and low outputs. Not a hex latch (that is its 174 cousin).

Dave

[snuci]

The two 2*10 way ribbon cables on the CPU card (J1 and J4) are connected to the keyboard and the display (not sure which way round though) - but I am going to hazard a guess that J1 is the keyboard and J4 is the display (based on the number of connections to the connectors).

I think you have it right. When the cards are stacked, the connectors line up as do the power connector terminals. The cassette drives are on parallel connectors. Drive one is closest to the edge of the board.

The keyboard goes to the connector marked "158". This goes off to a small board that then goes to the keyboard. Newer MCM/800s have circuitry on the keyboard. I am thinking this small board may be that circuitry as the MCM/70 keyboard has no ICs. The lone connector on the other side of the board goes to the display. The display runs on 250V that is fed from the green tape "2" from the power supply board. "1" and "3" go to the batteries.

I asked about the ROM dumps and since I have been working with the University, making them available is a bit of a liability. I will see if I can get the ROMs read. I think I know who did them for the university. I will be happy to make them available if I am able. Unfortunately, the MCM/70 emulator that is being worked on seems like it's a couple of months away. Perhaps it's release will make the ROMs available. I don't have any knowledge of how it is being done so I don't know for sure. I wish I had better news.

[daver2]

>>> The keyboard goes to the connector marked "158". This goes off to a small board that then goes to the keyboard.

That's why I am not getting much joy resolving the interface between CPU/J1 and the keyboard - there is a 'bodge board' in the way...

The ROM board is being a little hesitant to give up it's secrets! I think I have identified the ROM manufacturer and type - and an associated data sheet. This gives me a starting point for the power supply pins, address, data and chip enables to start from.

It would appear as though the ROMs have an address latch on the front end. There are two (active high) chip enables - two separate lots of 4 bits - that appear to be connected together in this application. The 74155 provides active low decodes - so the 7404 inverters appear to act (primarily) to turn the active low chip enables into active high. I am sure 1 or 2 have other uses though. 19 ROMS. 4*6 7404 inverter gates = 24 inverter gates.

The 7405 (open collector inverters) buffer the data bus from the ROMs to the data out pins of the bus to the CPU card.

My initial guess would be that I have DOUT0..7 swapped on my schematic for the RAM card...

There are quite a lot of traces that are on the component layer of the PCB and are hidden by the ICs. Extracting a definitive schematic for the ROM board will be difficult as a result.

I will have a look this week at the 74175 and 7400 logic and see if I can deduce what is going on.

I will also have a look at the CPU board for a little light entertainment !

>>> I asked about the ROM dumps and since I have been working with the University, making them available is a bit of a liability.

Never mind. Let's see how far I get in understanding the hardware first...

It looks as though the -9V supply is not used on the ROM board.

Dave

[daver2]

My initial 'poking about' with the CPU board indicates a pretty good correspondance to the Intel SIM8-01 (not unsurprisingly)...

Dave

[snuci]

My initial 'poking about' with the CPU board indicates a pretty good correspondance to the Intel SIM8-01 (not unsurprisingly)...

Yes. York University has the original Sim8 that was sent to MCM to test out the 8008 so it would make perfect sense.

[snuci]

I asked Josh Bensadon to take a look at this thread. He is the one that can read my ROMs if needed. He did email some information because he has an expired login id but it's causing him issues to get back in.

Josh mapped out the MCM/800 which is very similar to the MCM/70 but the MCM/800 emulated the Intel 8008 with discrete logic so there are differences. This is a cut and paste of his email after looking at this thread. I have shared the pictures with him and will be happy to lend him my MCM/70 if he promises not to break it

<quote>
To answer some questions on there:
Yes, switching power supply in 1972. As we emailed earlier, while it's 1 board, it's actually 2 power supplies.
The Primary power supply.
-120VAC to 14VDC to charge the batteries and run the 2nd power supply.
-always ON
-outputs "AC Fail" and "Battery Low" signals to logic boards

Secondary power supply
-12 to 14VDC in
-multiple outputs +5V, -9V, +12 and +250VDC for burroughs selfscan (unless this is done by a 3rd power supply on the MCM/70)
-Soft ON/OFF input
-Start switch is only wired directly to this power supply to turn it ON.
-An output port latch will turn off this power supply on the []OFF command


The ROM's are MASK ROM's, 19 chips of 2K x 8. Organized to occupy the first 8K only as follows:
0-7FF M1 ROM
800-FFF M2 ROM
1000-17FF M3 ROM
1800-1FFF 16 Bank switched ROMs B0 to BF

An Output to port 0 selects the BANK... I think on the upper nibble.

Address 2000 to 3FFF are for the 8K of RAM.
3FFF is the highest address possible with 8008 cpu.

The I/O of this machine is:
System input, Power fail, Battery low.
System output, Power down the computer
Keyboard output, Scan row
Keyboard input, Column return
On the MCM/800, the key repeat is done in hardware (not sure if it's same for MCM/70)
Display Output (this is complicated).

Next are the I/O for the peripherals.
3 outputs are:
AOS (Address Output Strobe I think it stands for)
COS (Control output)
DOS (Data Output)

2 inputs are:
GSI (Status Input)
GDI (Data Input)


It is through AOS,COS, DOS, GSI, and GDI that the machine talks to the Cassette drive, Serial Port, Floppy drive (on the MCM800), CRT display, printer, etc.

Devices on the OMNI PORT, get addressed through AOS. Addresses C8 and C9 are to select the cassette drives 0 and 1.

About the display... well, that ties into memory usage.
address 2000 is the display buffer 222 bytes. The remainder is for temp/system use.
The page at 2100 holds a 13 word heap (or stack) and the remainder is for temp/system use.
The RAM at 2200 and up, is for the user and APL system and is allocated in blocks (more than this, I don't know as this is as far as I got in dissassembling the firmware).

Now, on the MCM800, there is an I/O instruction that was customized to read a hardware pointer, fetch that RAM content and output it to a port for display.
This instruction is executed in the loop that waits for keyboard input, thus refreshing the display.

The MCM/70 uses a similar instruction, but does not do all these custom actions as described since it's a real 8008 processor (Remember, the MCM800 is a custom built 8008 from discrete logic). I expect the CPU board dectects this I/O instruction (7F) and handles this DMA in hardware to refresh the screen. So, the 7F instruction just triggers this DMA to occur.
</quote>

Hope this helps.

[daver2]

Very interesting.

I haven't managed to get around to looking at the CPU/ROM board any further yet on my business trip. Perhaps tonight or tomorrow now I have a bit of something to work with.

Dave