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Thread: recreation (soon to be) missing ICs

  1. #11
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    Quote Originally Posted by KC9UDX View Post
    You simply cannot make a SID with digital logic alone. You can approximate one, but it won't really be a SID.
    PAL/GAL/CPLD/FPGAs are digital in nature only. As I understand, the SID has both analog and digital parts. For such a chip a feasible approch would be to analyze the two parts seperately. The digital parts will consist of some registers, counters, logic functions which in turn can be described with a standard digital only HDL. (fully implementable on an FPGA) For the analog parts, they must consist of resistors, capacitors and transistors of some case. I guess it should be possible to reverse engenner this aswell. Maybe you would need a skilled analog designer, some educated guesses, and some time.
    Maybe its even possible to get from commodore the original plans, as they have no longer any interests in selling those chips.

  2. #12
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    Quote Originally Posted by GiGaBiTe View Post
    Many of these old chips are slow enough that you can emulate them in an FPGA, but getting them cycle accurate and functionally accurate is a different story.
    Do you think it would be possible to reverse engeneer the undocumented features? Also bugs can be reintroduced depending on the goal you wanna achieve. In the case of fitting new hardware into old, beeing cycle accurate should be the key thing.

  3. #13
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    Quote Originally Posted by 2icebitn View Post
    The January 1987 BYTE is in part devoted the PALs and their programming. You'll need a lot of pals/gals to implement anything substantial I would imagine, and modernish FPGAs are very dense, some even having a microprocessor core built in. Buy you have to start somewhere. Rome wasn't built in a week. The issue is free on archive.org.

    Being one chip I've been eyeing is designated a gate array, I'm guessing/hoping emulating it's functionality should be doable. This may be the first gate array, as specified, with a gold cover. The Mindset has 2 custom "processors", 1 for graphics, 1 for sound, that are identical to the if in question. Most asics/gate arrays have a standard ceramic packaging. All of which means nothing I guess. But a high performance gate array/processor seems to indicate a good deal of integration. And more then likely the gate array does also.
    Thanks for the source, I will go and have a look Todays FPGAs have a huge amount of power. I guess bringing the chip onto an FPGA is doable. What I am a bit worried about would be getting a description of the chip(s). You need to understand exactly how they behave to recreate them.

  4. #14
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    Quote Originally Posted by eeguru View Post
    If the idea is to make form-factor DIP replacements for augmenting older/existing PCBs, things get interesting. .3" and .6" standard widths of a traditional DIP footprint does not leave much board space for an equivalent circuit - even those from high density devices like PLDs and FPGAs. Using machined Mill-Max tapered pin-headers leaves almost the full .3/.6 width. But the PCBs stand pretty high over the DIP socket. Using Batton Allen BA3760 Dill Leadframes makes a PCB DIP module that looks more like a real DIP. However it leaves even less room on the board. A .3" narrow DIP only leaves ~.25" of usable width.

    Not many packages will fit in those widths unless you go chip-scale - which is even more difficult.

    Some successful part choices I've used to make DIP modules:

    5V .6" modules: Atmel ATF1504 in a TQFP-44, 22v10 and 16v8s in TSSOP
    5V .3" modules: 16v8 in TSSOP if you are willing to drop a couple pins. And my new fav, Silego (now owned by Dialog) GreenPAK4+ devices in STQFN20 (SLG46722 and SLG46121 in particular).

    3V .6" modules: (requires level translation) Lattice iCE40up5K in QFN48, Lattice MachXO2 1200 in QFN48 and 256/640 in QFN32.

    -Alan
    That really sounds interesting. In truely digital circuits you would need, besides the FPGA/CPLD a logic shifter, clock circuitry, and a voltage regulator, as most devices operate on 3.3v nowadays.
    Going directly to a custom chip (in a dip package and running on 5V) would be much nicer.

    What functionality did you replicate? Do you often work with the iCE40?

  5. #15
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    Quote Originally Posted by ThommyThomaso View Post
    ...a logic shifter, clock circuitry, and a voltage regulator, as most devices operate on 3.3v nowadays.
    Well the nice thing about ATF1504s, ATF750s, 22v10/16v8s and the GreenPAK devices is they are 5V already. Most device ICs you are wanting to emulate that have state already have a clock input somewhere on them. And all the GreenPAK devices have multiple RCs with lots of flexible taps.

    Quote Originally Posted by ThommyThomaso View Post
    What functionality did you replicate? Do you often work with the iCE40?
    I used the GreenPAK devices recently to emulate a couple decoder chips (74LS157 and a 8x4 PROM) in the PCjr to remap some strobes. I've emulated a Signetics PLS105 with an ATF1504. The 105 went out of production 30 years ago. The nice thing about the GreenPAK parts is they are non-volatile and in-circuit programmable over I2C. So you could make a generic logic DIP-14, DIP-16, DIP-18, etc as long as GND/VCC lined up and program them for whatever. $.50 in Qty.1 as well.

    The iCE40UP5K is my new favorite part. 128K internal SRAM (along with 15K of EBR) makes it nice for soft-cores. Still only 3.3V. But you get high current drivers, a PLL, 8 hard MACs, multiple bitstreams on flash, 5K LUTs, 2x each of hard I2C and SPI perpherals, and a true open synthesis chain, and other goodies. I'm working on a MSP430 optimized for the DSP slices for it (est. 1200 LUTs and 2 of 8 DSP slices). Couple dual rail level translators and you can easily have a small micro with plenty of logic to spare.

    -Alan
    "Good engineers keep thick authoritative books on their shelf. Not for their own reference, but to throw at people who ask stupid questions; hoping a small fragment of knowledge will osmotically transfer with each cranial impact." - Me

  6. #16
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    There already are several SID clones, and clones of other C64 chips.
    -----[ Al ]-----

    3 - TRS-80 Model I, TRS-80 Model 4D, LNW-80 Model I, Coco, 3 - Coco 2, Coco 3, 2 - Tano Dragon 64, C64, C64c, C128, 2 - Atari 800XL,
    Atari 520-ST, Atari Mega-2 ST, Amiga 1000, TS-1000, TS-2068, ZX-Spectrum, IBM 5150, 2 - Apple ][gs, Laser 128, and a butt load of Macs and Intel PCs.

  7. #17
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    Quote Originally Posted by ThommyThomaso View Post
    PAL/GAL/CPLD/FPGAs are digital in nature only. As I understand, the SID has both analog and digital parts. For such a chip a feasible approch would be to analyze the two parts seperately. The digital parts will consist of some registers, counters, logic functions which in turn can be described with a standard digital only HDL. (fully implementable on an FPGA) For the analog parts, they must consist of resistors, capacitors and transistors of some case. I guess it should be possible to reverse engenner this aswell. Maybe you would need a skilled analog designer, some educated guesses, and some time.
    Maybe its even possible to get from commodore the original plans, as they have no longer any interests in selling those chips.
    The functions of sound chips are emulated in software already. Analog logic implemented in digital software. I would have to imagine that these analog functions could be emulated in digital logic also. Think along the lines of a digital to analog converter.

  8. #18
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    Quote Originally Posted by ThommyThomaso View Post
    Do you think it would be possible to reverse engeneer the undocumented features? Also bugs can be reintroduced depending on the goal you wanna achieve. In the case of fitting new hardware into old, beeing cycle accurate should be the key thing.
    Most of the undocumented features of the 6502 have been known for a long time, so you don't have to do much legwork in researching them, you just have to implement them.

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