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Thread: Ruud's diagnostic ROM for IBM PC, XT and compatibles

  1. #21
    Join Date
    May 2006
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    Quote Originally Posted by modem7 View Post
    I am looking forward to a ROM based diagnostic that is not misleading when it comes to the testing of conventional RAM.
    Quote Originally Posted by Ruud View Post
    Please, explain a bit more? I check the very first 2 KB of RAM very thoroughly (I think). Having a reliable base where I can create a stack I use the same subroutine toy check the rest of the memory. So if you think my test is not good enough or you have other complaints, please tell me! I'm looking forward to ideas that can improve the tool. We will all benefit from it.
    No complaint/criticism. The 16K CRITICAL MEMORY REGION test in the Supersoft ROM diagnostics is many times misleading. One example of many is the screenshot that you pointed to in post #12. Notice that with no RAM fitted, the Supersoft diagnostics do not fail bit 0.

    I am hoping that you will do a much better job of reporting problems in the first 16K of RAM.

  2. #22

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    Quote Originally Posted by modem7 View Post
    No complaint/criticism.
    I didn't see it as complaint. And criticism can be good. But not being a native English speaker does sometimes give me trouble to understand what someone exactly means. And the other way around is quite possible as well.

    The 16K CRITICAL MEMORY REGION test in the Supersoft ROM diagnostics is many times misleading.
    To be honest, I have no idea at all why Supersoft does give the very first 16 KB this name. OK, a 5150 with a 16-64KB board won't start at all if the first 16 KB are bad. But this ROM is meant for the 640KB board as well and that one needs 41256 DRAMs in the first row. And then this "16K CRITICAL MEMORY REGION" doesn't make any sense anymore. For me a good working 2 KB of RAM at the start is good enough to complete the test.

    Notice that with no RAM fitted, the Supersoft diagnostics do not fail bit 0.
    I noticed that too but I considered that as bug. In quite some cases I studied the source code of the Landmark ROM to find out how they did things. I'm quite sure that I know how to test RAM and therefore I didn't even had a look at their routines and used my own ones.

    I am hoping that you will do a much better job of reporting problems in the first 16K of RAM.
    Do you have something in mind? Then please tell me, I'm always open for nice ideas.
    My philosophy is simple: test the RAM byte by byte and stop at the first error. The line with "Checked RAM" tells you how many KBs tested fine. The next two lines show you which bits are bad. If there is only 64 KB on board than the line with "Checked RAM" will show 64 KB as amount of tested RAM and (normally) all bits will be bad. If you have two banks of 64 KB and you have one or two bad bits, then you know one or two bad RAMs in the second bank (or badly seated or corroded connections). Up to three bad bits I notify as "bad RAMs". If more than three bits are bad, I'm not sure what to think of it and I signal "End of RAM".
    Please note that I don't display the exact address of the error. The screenshot shows 06E40 as bad address. (if there is no RAM present, how can the counter get so far, even beyond the 16 KB boundary ???) The user now must have some knowledge of hexadecimal numbers and must now calculate the number of good KBs. Then he knows in what bank to find the trouble shooter. I simply give the right KB, in this case 27 KB. And the user knows immediately that the troubleshooter is in the 2nd bank in case of 4116 DRAMs. In any other case it is always the first bank.
    With kind regards / met vriendelijke groet, Ruud Baltissen

    www.baltissen.org

  3. #23
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    Quote Originally Posted by Ruud View Post
    Do you have something in mind? Then please tell me, I'm always open for nice ideas.
    I agree with what you are doing.

    Quote Originally Posted by Ruud View Post
    First: it it the very first public version and never tested in a real PC, just the PCem emulator. But I appreciate it very very much that you actually tested it in a real motherboard
    I will (when time permits) do some testing on real hardware as well.

  4. #24

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    Hi Ruud,

    same board, next try:

    https://imgur.com/a/U2wSLtX

    Exchanged the RAMs and switched randomly some DIPs.

    You cannot see in the picture, but the cursor is again in the top left of the screen and nothing is happening...

    What does it mean?

    To my surprise, currently the Supersoft ROM is not outputting anything...no picture, no beep! That a big plus for your ROM

  5. #25

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    OK, I promised to test my diagnostic ROM on real hardware. Saturday morning I got a migraine attack. Fortunately my headaches are minor compared with other people that I know that have migraine but still.

    Late in the afternoon I disassembled the motherboard, replaced the VGA card with a MDA one, started the PC and.... nothing on the screen. To make a long story short: the first 1 KB of RAM on the MDA card was broken and a faulty switch in the MDA monitor.
    Sunday I was able to test the ROM itself. I ran into two weird errors:
    - Like when testing it on PCem, timer 2 of the 8253 failed. I use a subroutine to test all three the timers (just like Landmark does) so I was quite puzzled. I had isolated the part in Landmark that does test the 8253, copied that to my source, killed my own part, assembled the whole, started the ROM and..... timer 2 failed here as well ?!?!?! The only ide a I have right now is that I do something before the test that for one or another reason influences the test for timer 2.
    - My keyboard was bad according my ROM. OK, I use a KVM switch + AT2XT converter but if the PC doesn't complain, why should my ROM? But being a good sport, I installed an original Taiwanese XT keyboard and... error as well. And here I have no idea at all what is causing this behavior. Back to the drawing board.

    To be continued....
    With kind regards / met vriendelijke groet, Ruud Baltissen

    www.baltissen.org

  6. #26

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    Quote Originally Posted by Ruud View Post
    - Like when testing it on PCem, timer 2 of the 8253 failed. I use a subroutine to test all three the timers (just like Landmark does) so I was quite puzzled. I had isolated the part in Landmark that does test the 8253, copied that to my source, killed my own part, assembled the whole, started the ROM and..... timer 2 failed here as well ?!?!?! The only ide a I have right now is that I do something before the test that for one or another reason influences the test for timer 2.
    I see you copied the description of port 61h from Ralf Brown's PORTS.LST, where bit 0 is misleadingly described as "gate to speaker". This is actually the timer 2 gate input on the 8253, when disabled that timer doesn't run at all (the speaker can then be controlled directly by bit 1). To leave the speaker off but enable the timer, you should always write xxxxxx01 to that port.
    Last edited by dreNorteR; February 12th, 2019 at 04:03 AM.

  7. #27

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    Hallo dreNorteR,

    I just checked a schematic and you are absolutely right! I will change my code ASAP and I will you all know.
    Many thanks!
    With kind regards / met vriendelijke groet, Ruud Baltissen

    www.baltissen.org

  8. #28

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    I changed the code and the test of timer 2 works fine now. Now the keyboard...
    With kind regards / met vriendelijke groet, Ruud Baltissen

    www.baltissen.org

  9. #29
    Join Date
    Feb 2010
    Location
    Russia, St.Petersburg
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    195

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    Ruud Does your BIOS output to the POST card port 80h ?
    Convantional XT-class BIOSes does not output POST diagnistic to the port 80h, so AT POST-card is practically useless for XT.
    Original IBM XT BIOS does output to the port 60h, so it is possible to use IBM BIOS and modify POST-card to address 60h.
    http://www.minuszerodegrees.net/misc/post_cards.htm

  10. #30
    Join Date
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    Russia, St.Petersburg
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    Ah, found in the sources
    Code:
    ;**  Output a debug code to the two main LPT ports and IBM's debug port
    %macro OutDebug 1
    	mov	al,%1
    	out	80h,al			; IBM's debug port
    	
    	mov	dx,278h			; LPT 2
    	out	dx,al
    
    	inc	dh
    	out	dx,al			; LPT 3
    %endmacro

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