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Thread: Compaq Portable RAM Decoder PROM - reverse engineer help?

  1. #1
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    Question Compaq Portable RAM Decoder PROM - reverse engineer help?

    Hello!

    I have acquired a Compaq Portable, and in the usual restoration process, backed up all the socketed ROMs.
    Including the U35 RAM Decoder PROM (256 x 8; 82S123 type; mine is a TI TBP18S030N). According to the service manual, this can be changed to a version that will allow using 256Kx1 DRAMs in bank 2 and 3, instead of 64Kx1. This means 640K RAM on the system board instead of 256K, meaning a RAM card is no longer needed.
    Another requirement is BIOS C or newer. Mine has BIOS C. I cannot find any of the later ones online.

    The Compaq part numbers for these Bipolar PROMs are:
    256K: 100349-001 (my one)
    448K: 101256-001
    640K: 101257-001 (the goal)

    I have read the 256K one, and traced out where the pins go. I have tried to trace further but it is a neverending maze. This is probably not enough information; if you need more, please ask. I understand if this is too ambitious of a mission; just seeing if someone may have an idea. Everything in the pic below.



    Cheers!
    JD
    Last edited by nztdm; March 22nd, 2019 at 12:45 AM.

  2. #2

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    Since the banks are always the same in number, the RAS and CAS decoding will be spread apart within the address space. The input of the PROM is probably a registered set of addresses from CPU. Another thing that the PROM (or some other bit of logic) must do is supply the additional address line of the 256Kx1 DRAM chips with respect to the 64Kx1 chips. The additional address line is on pin 1, so you might trace back the connection going to pin 1 of the banks that can accept 256kx1 chips and get more clues.
    However, it's not a simple task if you don't start some stateful logging of the machine (you need a logic analyzer) or you get a much more complete schematic of the thing.
    Frank IZ8DWF

  3. #3
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    Thanks for that!

    I have found the schematic, which simplifies my original diagram a bit.

    Updated diagram here:


    Schematic here: https://drive.google.com/open?id=1aO...e86lfihagFYoT4

    I don't have a bipolar PROM programmer. I can probably prototype with a GAL instead, and some prototype board.
    Last edited by nztdm; March 23rd, 2019 at 08:15 PM.

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    Default

    Updated further. Wish they'd extend the edit time limit from 15 mins.


  5. #5

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    Well, now with the schematic, it's all more clear
    First of all, U35 PROM only decodes the banks' RAS/CAS lines.
    So, if all the banks are 64k, then A16 and A17 inputs must be the only RAS/CAS source, so verify that D2-D5 outputs only depend on A16/A17, only one output should go low for each 4 possible combinations of A16/A17 (And with A18/A19 always =0 possibly). If all banks are 256K, the same should happen for A18/A19 as inputs, ignoring completely the state of A16/A17 that will be instead the input of the MA8 line on the RAM banks (pin 1).
    Dack0 input and D6 output to the CAS decoder are probably part of the refresh logic, and once recovered the logic equations that produce D6, it must also changed to use A18/A19 instead of A16/A17 if present in the equations.
    Now, if the new prom is installed, then RAM banks must be fed with A16/A17 and that's on page 1 of the schematic:
    U83 LS158 2:1 multiplexer. It must be connected to A16 on pin 2, A17 on pin3 and drives MA8 line from pin 4. E36, E37 might be jumpers connecting those lines to a supply rail or to the correct Address bus lines depending on the chip's size populating the banks or might even be always connected to A16/A17 even with 64K banks, since the 64kbit chips would ignore the input on pin 1 anyway.
    HTH
    Frank IZ8DWF

  6. #6
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    Wink

    Thanks for that!

    First of all, U35 PROM only decodes the banks' RAS/CAS lines.
    Doesn't it also select RAM and ROM via G and G2B ?

    ---

    I have just examined and confirmed that my truth table is indeed correct. Rather than wiring up and reading the PROM in my programmer as a 2716, I connected up a DIP switch and some LEDs and went through the 32 bytes.
    I have made a less condensed truth table for better visualisation.


    Bank 0 and Bank 1 are soldered 64Kx1 ICs.
    Bank 2 and Bank 3 are sockets. If Bank 2 and Bank 3 contain 256Kx1 ICs, then there is now 640K total. This was the intended configuration when using Compaq's 101257-001 PROM. In the Compaq documentation, it doesn't mention jumper changes are required for upgrading to 640K. I don't think 1MiB was an intended configuration, but will probably work with the correct PROM (or GAL) like it does in the IBM XT, and allow UMBs.

    Here is a photo of my board:
    You can see the socketed U35 PROM next to Bank 3. The SW2 DIP switch for setting RAM quantity isn't present, as this must be a newer board, as it has BIOS Rev C, which supports Option ROMs, and autodetects RAM quantity. I see one jumper location on the board, next to the System ROM. J111. It's joined on the PCB from pins 1-2. This jumper is on second page of the schematic PDF. 1-2 connects ROM-A14 to Pin2 U41 LS138. 2-3 connects +5V to Pin2 U41 LS138. Perhaps it's something to do with the many non-present ROM sockets.

    Last edited by nztdm; March 24th, 2019 at 03:16 AM.

  7. #7

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    Ok, so I didn't read the truth table enough to realize the RAM RAS enables are active high. They only depend on A16/A17 and A18/A19 both Low. So you must change the truth table to make them depend on A18/A19 only and extend probably /G to remain low on the new extended ram space (though it must remain high when A16,A17,A18,A19 are all high, since that's where ROMs are).
    You can't obviously have all 1Mbyte of RAM mapped since that would conflict with the ROM space.
    Frank

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    Hello

    Yes of course I can't have all 1MiB. I was meaning installing all 256Kx1 chips, and having a region of about 192K mapped above 640K for UMB. This is what is sometimes done with the IBM XT's PROM.

    The LS158 chip has inverting outputs. So when the PROM goes HIGH, a CAS will go LOW, unless /SEL is HIGH (when DACK0 is LOW), which will make all CAS lines HIGH.

    So for Bank 0 and 1 being 64K each, and Bank 2 and 3 being 256K each, maybe this truth table, if I'm understanding correctly?



    Thanks
    JD

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    Default

    Just curious--how does this compare with the mapping ROM on the 5160?

  10. #10
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    Default

    Quote Originally Posted by Chuck(G) View Post
    Just curious--how does this compare with the mapping ROM on the 5160?
    I am not sure as I don't have a 5160, I just read about it.
    From what I can see, it uses an 82S129 equivalent, which is quite different to this 82S123 equivalent.
    82S129 has 8 address lines and 4 data lines, two chip-enables.
    82S123 has 5 address lines and 8 data lines, one chip-enable (always enabled in the Compaq).

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