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Thread: History and start of life of my strange 11/45

  1. #1

    Default History and start of life of my strange 11/45

    Hi,

    In 1995 during learning session, I discovered PDP-11 architecture and programmation. I liked it a lot. Since few years now , I search to get my own PDP. I wanted a unibus machine not Qbus. A 11/70 or 11/45 would have been perfect , but I didn't find something interesting. Last year I thought :"Is it possbile to build one from scratch ?". So, I start to read and read and read again DEC documentation (Thanks to bitsavers guys !) . I also learned to make PCB boards and re-learned electronic (I learned basic electronique around 1988 ). Around july 2018 , I decide to really start the study. I choose 11/45 for 2 reasons:
    1) 11/70 is a little bit complex fo me.
    2) I like the concept of Unibus B in 11/45.

    My goal is to keep the "spirit" of PDP11. Mes requirements are :
    1-My boards must be run into a real PDP.
    2-My PDP can use boards of real PDP.

    I studied an hardware architecture and finnaly I decided to have (for the first "shoot") this backplane architecture :

    Screen Shot 04-19-19 at 08.49 PM.jpg

    Today I plan to use a brige between row 2 and row 3 to use dual port memory.

    The actual state of this project is
    1 M930 and 1 M9302

    terminators.jpg

    1 Test board for SPC . The board helped me to debug wrapping of backplane. I use it to visualize the signals and put an logical analyzer.

    1 CPU Board (Will emulate KB11A +MMU+FP). On right part there is 2 connectors for the console. Switch on board can activate or not some parts (MMU/FP/M9312). CPU can use external LTC signal or use an internal clock. An connector is present to connect a USB terminal (MobaXterm in my case) . Not in the "spirit" of PDP 11 .


    cpu.jpg

    Few G227 Boards.
    Of course a backplane has been made.

    backplane1.jpgbackplane2.jpgbackplane3.jpg

    All boards:

    allboards.jpg

    On the top left the memory board with 128Kw. Some bugs was found in it , I modified PCB routing using wiring and cutter !.

    An other small board has been made to filter the power supply, give a 3.3v and simulate sequence of ACLO and DCLO.
    Terminators,bus control,Memory board seems to works correctly. CPU Test are not finished yet but as far as now all tested parts work.

    Today I decided to show you this year of work.
    And now ? Of course I will ontinue on it, I already know that I will make a new CPU board ,but this one will ge me a lot of work!. I am studying also a RL11 SPC board (With 4 emulated RL02).
    I let you to comment this project maybe you like , maybe not...
    Thank you for reading me to the end

  2. #2

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    Wow! That's a great start for a year of work.

  3. #3
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    Default

    So do you have an 11/45 running on your FPGA (what is it by the way, the photo resolution is too low) in simulation?

  4. #4

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    No, system is not yet operational. When I say “Start of life”, it means , power on. Until today I mainly worked on hardware part. At this day 95% of hardware has been tested.
    This week end , I checked signal integrity through backplane. it look goods but with some cross-talk between MSYN and SSYN.
    I also started to write some code to test DATI/DATO operations. Seems ok with time cycle around 250/350 ns (Tested with my 128kword board). Test was intensive to detect corrupt signals between CPU and memory. No issues found.

    I didn’t use FPGA for 2 reasons :
    1) When I started this project , my electronic knowledges was not strong enough to start with FPGA. Now, I am thinking about it.
    2) My objective was not absolute performance. I hope to obtain something near the real machine. I am not looking for something 5x faster than original.

    I need to also work on a SCP board to have ‘somebody to talk with’ . My goal is a to have an RL11 emulator. But if someone agrees to lend me one, I'm not against .
    I will start development in few hours, some parts in DEC documentation are not clear for me , so I will need help to do the job properly.
    Thanks.

  5. #5
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    My bad, I was guessing it was an FPGA. Could not read the parts marking. What CPU is it?

    You might want to look at the SIMH simulator: https://github.com/simh/simh in PDP11/pdp11_cpu.c to give you a head start on the complexity of a full PDP-11 CPU design.

  6. #6
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    That is really fantastic work! To me the DD11 backplane PCB is especially interesting, I'm sure there would be a market to sell a few repop's of those.

  7. #7

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    Thanks for the comment. I have a lot of works to finish this project !
    AK6DN, the mainboard use a MCU with an ARM core running at 102 Mhz. To be honest, I am not sure it will powerfull enough to simulate all parts . Yes I know SIMH , and I already read and analyse many DEC documentations around KB11A and 11/45 . I am sure to have work for at least 1 more year !

  8. #8

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    AK6DN, I discover your site . It is a gold mine for me. Thanks a lot. I was looking for M9312 rom .It is perfect.

  9. #9

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    Very impressive work.
    And having the emultaed 11/45 on a single board which would directly go into a DD11-CK (or -DK) would certainly avoid the requirement of an oriignal backplane.
    It would be great to see your board talking to existing devices like a DZ-11, or an RL02, or even an RK05.

    Are you also planning to have your mainboard be equipped with the 256Kb memory in a later revision of it?

  10. #10

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    having the emultaed 11/45 on a single board which would directly go into a DD11-CK (or -DK)
    Yes, you are right, at the very first part of the study I tought like you, but with fast bus and unibus B it is not the same story.

    It would be great to see your board talking to existing devices like a DZ-11, or an RL02, or even an RK05
    Oh yes !. If I bring my part to you, can we test with your boards ? I will also like to connect my boards on the real 11/45 console, I respected the pinout on J1/J2.

    Are you also planning to have your mainboard be equipped with the 256Kb memory in a later revision of it?
    Not sure to understand , but today I already have a 256Kb memory board compatible Unibus or MUD. I am working on a revision to remove some bugs in the actual memory board, but this revision will be independant and should be compatible with other Unibus system.

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