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Thread: ASTEC AA11040C repair

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    Seeing you mentioned the Floppy Emu, did you run across this article: https://www.bigmessowires.com/2014/0...damaged-chips/

  2. #12

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    Quote Originally Posted by groink View Post
    Seeing you mentioned the Floppy Emu, did you run across this article: https://www.bigmessowires.com/2014/0...damaged-chips/
    Yes I've read it and sincerely it doesn't add any clue at least to what I know.
    My totally unproven theory is that those CPLDs have a bit of "datasheet confusion". I mean, if absolute maximum rating for inputs is 5.5V, how would it be safe to list the same 5.5V as the allowed range? If you check any good old TTL/CMOS datasheet, you'll notice something like absolute maximum rating of, say, 6V and allowed max input of, say, 5.5V. These differences exist to account for production tolerances etc.

    Frank IZ8DWF

  3. #13
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    Quote Originally Posted by iz8dwf View Post
    Well, unfortunately 5.5V is a bit on the edge. This particular PSU was sent to me because it seems the only thing that could have damaged two "FloppyEMU" boards. Unfortunately I haven't yet found a schematic of this FloppyEMU, but it uses a Xilinx XC9572XL CPLD directly connected to 5V I/O. This is usually fine since this part is rated up to 5.5V
    You see the problem here?
    Both FloppyEMU boards have a shorted CPLD

    I think I better tweak somehow the voltage regulation of this PSU if I can... I still can't believe they made a thing that regulate so poorly, even with all analog regulation, it should be better than 5% easily.


    Frank
    Different times with different requirements.

    I believe a C supply is basically a B, the +5V can be adjusted by altering R32 & R25 ratio.

    Failing that, an old style PC PSU with the -5V can still be bought 'new' and runs an Apple II easily, so you could always try one of these (I have one on my spare motherboard for testing and it works well, with the added advantage of having a soft switch to turn the PSU on & off)

  4. #14

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    Quote Originally Posted by iz8dwf View Post
    Yes I've read it and sincerely it doesn't add any clue at least to what I know.
    My totally unproven theory is that those CPLDs have a bit of "datasheet confusion". I mean, if absolute maximum rating for inputs is 5.5V, how would it be safe to list the same 5.5V as the allowed range? If you check any good old TTL/CMOS datasheet, you'll notice something like absolute maximum rating of, say, 6V and allowed max input of, say, 5.5V. These differences exist to account for production tolerances etc.

    Frank IZ8DWF
    One more "hint" from the datasheet: The 3.3V VCCINT power supply must be at least 1.5V before 5V signals are applied to the I/Os.
    Now, imagine a connected device to an Apple II where the 5V is raising, and the CPLD supply depends on the local 3V3 regulator capacitance decoupling (both input and output decoupling...). Do you believe the designer paid attention to this?
    That's one of the reasons I never use "tolerant 5V" devices in my retro-designs. Real 5V parts are still around (mostly Atmel and Altera), so why take these risks?

    Frank

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