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Thread: What are my DOS memory options for a 5170

  1. #51

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    Quote Originally Posted by Eudimorphodon View Post
    I do still wonder if there might be some way to convince it to use the E000 page, but congratulations on mostly getting what you wanted out of it. Have to admit I'm kind of jealous of your maxxed-out 286; I've never actually owned a machine with an EMS card. (Went straight from 640k-ville to a 486 in the early 90's.)
    Thanks - I'm pretty pleased with how it turned out. I bought this 5170 from a guy on craigslist and spent a lot of time goofing around with it to restore it. I removed the rust and repainted the case, I repainted parts of the front face, I've tried various video cards finally really liking an EGA wonder. I think I paid $100 or something for the memory board, but adding the memory allowed it to run my favorite compiler, Borland C++ 3.1. It has been a project...

  2. #52

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    Quote Originally Posted by alank2 View Post
    To try and move it to 0xD0000-0xEFFFF assuming this area is open would give the 128K that the USE!UMBS driver is looking for.
    There is no such requirement. USE!UMBS.SYS will accept any block size. The example command line in the source file is just that - an example (assuming that is where the confusion comes from). It will also accept several ranges, the limit is the config.sys command line length.
    Looking for a cache card for the "ICL ErgoPRO C4/66d V"

  3. #53
    Join Date
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    Quote Originally Posted by Eudimorphodon View Post
    (Does an AT have only 8-bit wide ROMs ...
    Yes.

    Quote Originally Posted by Eudimorphodon View Post
    ... and there's some kind of bus sizing signal being triggered, maybe?)
    No. See [here]. My hypothesis is that 16-bit ROM's were too expensive at the time, so IBM simply opted for the cheaper solution of two 8-bit ROM's.

    Quote Originally Posted by kgober View Post
    I suspect the E000-EFFF range is unusable because it's already mapped to ROM sockets on the motherboard. Even if the sockets are empty, the address decoders covering that range are presumably still active.
    Quote Originally Posted by Eudimorphodon View Post
    I don't think an active decoder would be an issue; without a device in the socket to assert itself on the bus when chip selects are active there's no way anything would ever be 'visible' to the CPU. (The decoder would just be another parasitic load on the address bus, as all decoders are.) Unless there's something about the AT's architecture that asserts some kind of bus signal when the area is hit that interferes with the operation of an ISA card.
    The way I see it: Refer to [here], which is extracted from the IBM AT Technical Reference. Between the U17/U37 ROM sockets and the data bus are transceiver chips. Irrespective of whether or not the U17/U37 ROM sockets are populated, the motherboard circuitry, when segment E is addressed for a read, is going to have transceiver chips U66/U67 deliver to the data bus, whatever transceiver chips U11/U5 'see' on the data pins of the U17/U37 ROM sockets.

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