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Thread: 80286 Real Mode emulation on 8088 ?

  1. #11
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    Quote Originally Posted by rmay635703 View Post
    Russian and Far East XTs had a simple hardware solution to emulate 286 like capabilities On the 8088/86
    I know only one such computer - EC1842 (ЕС1842 in russian layout). So, it's not simple solution. This machine has special 1810VM86M (1810ВМ86М) processor - this is not a clone of 8086, like 1810VM86 (1810ВМ86) without ending M. "M" mean "modified", in Russian the same meaning. This is not a clone V30 or 80186. It's realy unique processor, pin-to-pin compatible with i8086. Unfortunately, even in the Russian-language segment of the Internet, there is no official documentation on it. Also, EC1842 has special (KA1843VG1) КА1843ВГ1 IC, know as "virtual memory controller".

    From the old abstracts, it is clear that the processor can do the following:
    - have addition controls in FLAG register. Bit 14 and 13. Bit 14 control "virtual memory addressing" and bit 13 control ESC-opcodes int 07h generation;
    - can hardware run PUSHA,POPA,PUSHI,LEAVE,INS,OUTS opcodes. Opcodes IRET,CLD,CLI,STD,STI have modified. Can't run shifts (shr,shl) with arguments other than 1, imul, idiv with arguments, some other 186+ opcodes;
    - three additional interrupts: invalid opcode (06), change segment register in "virtual" mode (05) and emulation ESC opcodes (07);
    - shadow SS':SP' registers pair;
    - Four new opcodes to control shadow 'SS:'SP pair, F1 FA, F1 FB, F1 FC and F1 FD. F1 FA and F1 FB switched between SS:SP and SS':SP', other unknown.

    I have a 1810VM86M processor that is inserted into a regular XT-clone motherboard (not in EC1842). It's work like 8086, CheckIT and other sowtware detect it as 8086. Software, compiled with 80186 opcodes don't run on it. Right now I'm trying to write my own 186+ emulator for this CPU. Fortunately, it realy generate "invalid opcode" interrupt, so i can handle this interrupt and software emulate shifts and imul,idiv instructions.

  2. #12
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    Quote Originally Posted by Tronix View Post
    I have a 1810VM86M processor that is inserted into a regular XT-clone motherboard (not in EC1842). It's work like 8086, CheckIT and other sowtware detect it as 8086. Software, compiled with 80186 opcodes don't run on it. Right now I'm trying to write my own 186+ emulator for this CPU. Fortunately, it realy generate "invalid opcode" interrupt, so i can handle this interrupt and software emulate shifts and imul,idiv instructions.
    That can be fun, given an "invalid opcode" interrupt. It reminds of the time I wrote a CICS/VS S/370 instruction emulator for a client's S/360 system who wanted to run an S/370 code package we were marketing.

  3. #13

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    Quote Originally Posted by dreNorteR View Post
    It would be too slow to be practical - the single step interrupt alone adds 50 clocks to every instruction, including every single REP iteration!
    Hmm, what about emulating the CPU, then? The main instruction loop can be made rather short (read opcode, read 3-4 pointers from corresponding table entry, jump four times in total) and most instructions can receive a direct mapping. It would be slow, for sure, but for running some configuration programs (e.g. NIC setup mentioned in the other thread) it might work.

    I don't have a true i86, so I won't implement this, but the approach might work? I don't know how to integrate this with interrupts, though.

  4. #14
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    Any Turing-complete machine can emulate any other Turing-complete machine (Church-Turing thesis). All you need is storage and a generous old-age pension. If you want to simulate an 80286 with a 4004, it's possible, but not really practical.

    A more interesting question is if a Turing-incomplete machine can emulate aspects of any Turing-complete machine...
    Last edited by Chuck(G); November 27th, 2019 at 11:22 AM.

  5. #15

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    That's not what I meant... I was wondering how expensive it would be to emulate the instruction decoder plus some instructions instead of using single-stepping to implement 80186 instructions. In theory it should be possible to do this for a single process in DOS, if interrupt-hooking can be solved. A 5x slowdown intuitively doesn't feel too bad for some "NIC configuration" utility run once at bootup - if it gets the hardware to work in the first place.

    I don't think a full PC/AT emulator for i86 is useful. Misunderstandings are not my intention.

  6. #16
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    Since the bulk of the instruction set is common between the x86 and x286, I'd opt for patching the original code . You could do that by examining code before it's executed, block by block or using the single-step interrupt to feed a routine to decide if code needed patching. The result should run a near-maximum possible speed, since the end product would be an x86 compatible binary.

  7. #17
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    Hello,

    I need some help with coding 186+ emulator for 1810VM86M CPU. As I wrote above, this processor can generate int 06h invalid opcode interrupt and run PUSHA/POPA opcodes hardware. I want emulate ENTER x186 opcode but stuck on that. My current "invalid opcode" int 06h interrupt handler:
    Code:
            _rfl    equ 020h
            _rcs    equ 018h
            _rip    equ 016h
            _ax     equ 014h
            _cx     equ 012h
            _dx     equ 010h
            _bx     equ  0Eh
            _sp     equ  0Ch
            _bp     equ  0Ah
            _si     equ  08h
            _di     equ  06h
            _es     equ  04h
            _ds     equ  02h
            _ss     equ  00h
    
    new_06h:
    .286
            pusha
    .8086
    ;	push ax
    ;	push cx
    ;	push dx
    ;	push bx
    ;	push bp
    ;	push si
    ;	push di
    
            push    es
            push    ds                      ;Save ALL registers.
            push    ss                      ;Its not really nesecary to save SS ;)
            mov     bp,sp                   ;but this engine was built for expansion
    
            ;One thing to note, if you want to know the TRUE value of SP, that
            ;is, you must subtract 6 from it, which covers the calling cs, ip & f.
            ;and thats sub w[bp+_sp],6  not sub sp,6 ;)
    
            push    cs
            pop     ds
    
    GetOpCode:
            lds     si,dword ptr [bp+_rip]  ;Get the seg:off of the next opcode
    
    	dec si				; !!! WARNING here !!!
    
            cld                             ;clear direction
            lodsw                           ;get opcode
    
            ;AL now holds our bytevalue opcode.
    
    	cmp al,0c8h			; ENTER opcode?
    	jne Bad_opcode
    
           lodsw
    ;!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
    ; HERE I NEED DO 
    ; push bp
    ; mov bp,sp
    ; sub bp,ax
    ;!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
    
    Bad_opcode:
    RunNextOpCode:
            pop     ss
            pop     ds
            pop     es                      ;Restore the flags
    .286
            popa
    .8086
    ;	pop di
    ;	pop si
    ;	pop bp
    ;	pop bx
    ;	pop dx
    ;	pop cx
    ;	pop ax
            iret                            ;Run the next opcode.
    I need push value to stack (push bp) at interrupt before interrupt. I canít figure out how to do it right. Do I need to move all the values on the stack inside the interrupt?
    Thank you.

  8. #18
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    No, but you shouldn't be popping the old BP off the interrupt stack before returning, you need to discard that word. Otherwise, rather than using PUSH BP, replace the old BP on the stack and then pop in POPA order.
    Last edited by WBST; November 30th, 2019 at 11:02 AM.

  9. #19
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    Quote Originally Posted by WBST View Post
    No, but you shouldn't be popping the old BP off the interrupt stack before returning, you need to discard that word. Otherwise, rather than using PUSH BP, replace the old BP on the stack and then pop in order.
    The fact of the matter is that I need not only to change the value of the BP, but to save this value on the stack. For ex.:

    mov bp,1234
    enter 10,0 ; int 06h here. In int06_handler i need push bp / mov bp,sp / sub bp,10
    mov bp,0C0DEh
    mov bp,0DEADh
    pop bp ; <--- restore bp with 1234

  10. #20
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    For a nesting level of zero (0) shouldn't your effective code for the ENTER instruction be:

    push bp
    mov bp,sp
    sub sp,n <<<<<<<<<<< not sub bp,n

    I think the problem with your code is that you have written it 'classically' to be an interrupt handler (i.e. saving all of the registers onto the stack, doing something and then restoring all of the registers from the stack before performing an iret).

    Unfortunately, emulation code requires you to be very (very) nasty - especially with things like the stack contents (as you have just found out)!

    The problem is that you have to modify the stack contents after the INT 6 and then relocate the CS, IP and FLAGS to the 'new' location of the stack pointer before performing an IRET so to actually leave the stack as you would expect it to be after the LEAVE has been executed. You also have to be careful where you save/restore the registers to/from that you use as well.

    Have you any memory within the machine to play with - or have you got to do everything in registers?

    Dave

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