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Thread: PET 3032 garbage screen problem

  1. #41
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    Quote Originally Posted by Dwight Elvey View Post
    Lesson in PET video circuit:
    Excellent circuit analysis. It took me years to figure out that video timing circuit, and you got it correct with a quick look at the schematic. Good work.

  2. #42

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    Quote Originally Posted by Dwight Elvey View Post
    Lessen in PET video circuit:
    If you look at the display logic schematic page, you will see that video RAM address mux. It switches between the processors address and the address used to scan the video RAM for display. This mux is F3, F5 and F6. These bounce back and forth between the CPUs address and the videos character scan address. The character address is counted by F2, F4 and G6. From the schematic one can see that SA4 comes from BA4 or F4-2 ( QC ) counter. The mux switches back and forth based on CLK1. This makes watching SA4 a little hard. When CLK1 is low, SA4 is driven by the video counter. When CLK1 is high, SA4 is driven by the CPUs address.
    The video counters F2 and F4 keep track of the character currently being scanned on the screen. The video RAM, on the video RAM page, outputs a line of characters to the character ROM to generate each pixel of the screen. It does each column of each character and then increments the character counter to the next character. It has a clever way of keeping track of the character count for the 40 characters because it has to repeat the same characters at each horizontal scan, until all the rows of that character have been displayed. It does this by latching the character counter's initial value, in G3, front the first row of the next characters to be displayed. This way it can reload the character counter with the same character until the entire character rows have been displayed.
    So, the character counter repeats one line of character until all the rows of that line have been displayed.
    What is seems is that there is some issue with SA4 going to the video RAM. This could be a problem with F5, F4 or getting the address to the video RAM. If I were to make a guess, I'd say there was an issue with F5 but that is just a guess, you'll need to probe F5.
    Do you have a separate sync input?
    What would be desired is to sync to F5 pin 14 and watch both pin1 and pin 12. Pin 14 is the counters output.
    Then do the same with pin 13 and pin 12. Pin 13 is from the cpu address. Both of these would be best while looking at the clock and syncing on the first pin.
    You are only interested in what is happening while the CLK1 is high or low and what the CPU address is doing or the counter is doing but the interesting address is SA4, not SA1 or SA0.
    Dwight
    Thanks Dwight, measurements with the NOP GENERATOR or only with the 6502?
    What do you mean with a a separate sync input?
    Fran

  3. #43

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    Quote Originally Posted by Fran View Post
    Thanks Dwight, measurements with the NOP GENERATOR or only with the 6502?
    What do you mean with a a separate sync input?
    Fran
    Yes, with the NOP generator. Many scopes have what is called an external trigger input. This allows one to use that as a reference point to start the other traces. Normally one can synchronize to either input channels but also use a third input to trigger the two traces. This would be good for this case where we want to see things happening at different times.
    Often the synchronizing input doesn't need a good quality probe since we don't need to display it. If your scope had one, there would be an additional BNC connector called external trigger.
    I think we might get by with just triggering on the transitions F5-14 along with F5-12 as well as F5-13 along with F5-12, each using the trigger on F5-14 and F5-13 with both positive and negative edges.
    I'm hoping it will show the problem.
    The regular beat of the NOP generator might hide the problem. Two regular beats of the counter and the NOP might hide what we are looking for. We might go back to the CPU running things as well. Lets see what we have first. Trouble shooting is all about running experiments. The results will hopefully give us the answers we are looking for. We know something is wrong so we want to find the point in the circuit where we go from the expected to the unexpected.
    The video showed repeated pass and fail on a cycle of 16 characters. 16 bad and 16 good. 16 is a power of 2.
    Address bit 4 controls 0 to 15 and then 16 to 31 and so on.
    Dwight
    Last edited by Dwight Elvey; September 13th, 2019 at 05:26 AM.

  4. #44

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    I don't think it can be the address line going to the VRAMs. In case it was a stuck address, we'll be seeing the same RAM 16 bytes intervals twice. Random characters every 16 bytes is something a bit puzzling to diagnose.
    Not much help, just thinking.
    Frank

  5. #45

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    That is why I want to have him measure the SA4 signal at the RAMs as well.
    It could be a broken trace but the fact that I see a + sign on some of the failing locations would indicate a bad F5 that was letting the CPU address bleed threw instead of switching to the video. Hopefully we can see this on the scope. We don't want to trouble shoot with guesses when we can do it based on observation.
    Dwight

  6. #46

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    Quote Originally Posted by Dwight Elvey View Post
    That is why I want to have him measure the SA4 signal at the RAMs as well.
    It could be a broken trace but the fact that I see a + sign on some of the failing locations would indicate a bad F5 that was letting the CPU address bleed threw instead of switching to the video. Hopefully we can see this on the scope. We don't want to trouble shoot with guesses when we can do it based on observation.
    Dwight
    Even if F5 is faulty, the effect is still seeing part of the VRAM content, albeit with SA4 on the wrong state.
    To me looks like the CPU isn't initializing those 16 bytes rhegions of the VRAM and the video circuit is probably working well. But it's hard to suggest meaningful tests to narrow down the problem.
    I would surely trigger on Pin1 of UF5, first on rising edge and see if I get the BA4 signal (pin 13) to SA4 output (pin 12), then trigger on the falling edge and see if I get the video counter signal on pin 14 to SA4 output. Of course one should see both polarities of both BA4 and the video counter signal on the output.
    If both output match the correct input, then F5 is more likely ok.
    This test could be better executed with a NOP generator inserted.

    Frank

  7. #47

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    My scope have an external trigger input, but I have only two probes.

    Quote Originally Posted by Dwight Elvey View Post
    I think we might get by with just triggering on the transitions F5-14 along with F5-12 as well as F5-13 along with F5-12, each using the trigger on F5-14 and F5-13 with both positive and negative edges.
    Dwight
    CH1 F5-14 and CH2 F5-12



    some captures with the single trigger option

    F5_PIN14_PIN12 (1).jpg F5_PIN14_PIN12 (3).jpg F5_PIN14_PIN12 (9).jpg

  8. #48

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    CH1 F5-13 and CH2 F5-12



    some captures with the single trigger option

    F5_PIN13_PIN12 (1).jpg F5_PIN13_PIN12 (3).jpg F5_PIN13_PIN12 (5).jpg F5_PIN13_PIN12 (7).jpg

  9. #49

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    You need to speed up the trace. We need to see the quality of the bottom trace. We can't see much.
    As for trigger input, as I told you, you don't need a probe. You can get by with a wire. Be careful not to damage the BNC socket. You just need a piece of small wire stiffed into the center hole and a piece of tape to keep it from falling out until we take measurements. The videos have too much activity to see much.
    You also need to trigger on both edges of the input signal. I'd suggest about 5 or ten times faster sweep. The good stuff is in the purple trace, not the yellow one.
    Dwight

  10. #50

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    Quote Originally Posted by Dwight Elvey View Post
    Do you have a separate sync input?
    What would be desired is to sync to F5 pin 14 and watch both pin1 and pin 12. Pin 14 is the counters output.
    Then do the same with pin 13 and pin 12. Pin 13 is from the cpu address. Both of these would be best while looking at the clock and syncing on the first pin.
    You are only interested in what is happening while the CLK1 is high or low and what the CPU address is doing or the counter is doing but the interesting address is SA4, not SA1 or SA0.
    Dwight
    Quote Originally Posted by Dwight Elvey View Post
    I think we might get by with just triggering on the transitions F5-14 along with F5-12 as well as F5-13 along with F5-12, each using the trigger on F5-14 and F5-13 with both positive and negative edges.
    I'm hoping it will show the problem.
    Dwight
    Quote Originally Posted by Dwight Elvey View Post
    You need to speed up the trace. We need to see the quality of the bottom trace. We can't see much.
    You also need to trigger on both edges of the input signal. I'd suggest about 5 or ten times faster sweep. The good stuff is in the purple trace, not the yellow one.
    Dwight
    I'm not sure how to do what you tell me.
    As I said, my electronic knowledges are limited.

    I have connected the EXT to pin-14, CH1 to pin-1 and CH2 to pin-12, and these are the waves. As you can see I have varied the horizontal scale (time base). Trigger type Edge, I have to use another type of trigger?
    I apologize again for my ignorance


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