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Thread: PDP-12 at the RICM

  1. #1
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    Default PDP-12 at the RICM

    The PDP-12 at the RICM broke a few weeks ago, and I finally had a chance to look at it. When first powered up it will boot and run OS/8 from the RK05. It will not run SPACEWAR or TANK or any of the other demonstrations we normally use. It will run KALEIDESCOPE. That means that large parts of the machine are working OK including most of the CPU, Core, and even the EAE.

    Sometimes OS/8 will hang in a loop where it is executing the IOT 6041 and a JMP -1. It is waiting for a character to be sent out the console serial port before it can send the next character. At this point I can toggle in a little program that sends the contents of the AC out the console serial port, waits for the character to be sent (IOT 6041), increments the AC, and loops. This works OK. If I now run OS/8 it hangs in the IOT 6041 and a JMP -1 loop again. We swapped the M707 Teletype Transmitter flipchip, but it didn't make any difference.

    SPACEWAR loops in a JMP 0001 loop. This looks like it got an interrupt when it should not have.

    It ran Instruction Test 2 successfully. We will run all of the processor diagnostics, and maybe one will find something misbehaving.

    Ideas are welcome.
    Member of the Rhode Island Computer Museum
    http://www.ricomputermuseum.org

  2. #2
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    The PDP-12 passes MAINDEC-8I-D01C Instruction Test 1, but fails fails MAINDEC-8I-D02B Instruction Test 2. It gets stuck in an loop at 0001 executing a JMP 0001. Instruction Test 2 tests that interrupts happen when they should, and do not happen when they should, and tries this for a range of instructions. Either we have a peripheral that is generating an interrupt when it should not, or the CPU is processing an interrupt when they are inhibited.

    Looks like interrupt test #4 is not working. We swapped the M607 Teletype Receiver, but it did not make a difference. Running the CPU in single-step mode works OK if the Auto Repeat is on and set to a slow speed. So we don't have a solid failure, we probably have a chip with low drive capability.

    I looked through the diag code. The base code has a JMP 0001 in location 1. The first interrupt test does a JSR to a routine that writes a JMP I, 0002 into 0001 and clears locations 0002 and 0003. Each interrupt test writes a return address into 0002. It looks like the JMP I, 0002 was never written into 0001.

    Time for some single step debugging to see what is not working.
    Member of the Rhode Island Computer Museum
    http://www.ricomputermuseum.org

  3. #3
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    Ah, its a core memory problem. The Core from 2000 to 2777 is always 0000. The JMS instruction @2675 to the routine that fixes the JMP instruction @ 0001 never executed. As long as the Core stack is OK this should not be difficult to fix.
    Member of the Rhode Island Computer Museum
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  4. #4
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    Replacing the G221 in slot C08 got the memory working again. Now the serial console is not working...
    Member of the Rhode Island Computer Museum
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  5. #5

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    Memory problems...

    But you have fiddled with the serial card right? The M707. Test receive and transmit separately, which of them does not work?

  6. #6
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    Quote Originally Posted by anders_bzn View Post
    Memory problems...

    But you have fiddled with the serial card right? The M707. Test receive and transmit separately, which of them does not work?
    Anders,

    I did not diagnose the problem correctly. The Core between 2000-2777 did not work. OS/8 would load correctly and run, but would not respond to any console commands. Instruction Test 2 uses the serial port to generate interrupts, and to make sure that interrupts don't happen when the transmit flag is off, and do happen when the transmit flag is on. I misinterpreted this as a serial port problem. We have spare M706 and M707 modules, so I swapped them and that did improve the behavior. It looks like one of our spare modules is broken because the serial port worked OK when I put the original M706 and M707 modules back in.

    With the missing core memory it looks like parts of OS/8 did not execute therefore no CLI. Part of Instruction Test 2 did not get loaded, especially the part that setup the JMP I, 0002 for the interrupt tests.

    This was a good lesson in debugging because I was convinced that the serial port problems were caused by hardware, and it technically was a software problem. The memory problem that caused the software problem was really a hardware problem.
    Member of the Rhode Island Computer Museum
    http://www.ricomputermuseum.org

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