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Thread: Designing a 16-bit ROM card

  1. #1

    Default Designing a 16-bit ROM card

    I'd like to make an ISA ROM card that supports 16-bit access to the option ROM.

    My thinking is to essentially copy the design of the lo-tech 8-bit ROM card's comparator, but tie the ISA signal MEMCS16# to the P=Q output signal of the comparator that drives the chip select pin on the ROM itself.

    Then use a word-addressable EPROM, ignore ISA A0 and tie ISA A1-A14 to A0-A13 on the EPROM. I obviously don't want to deal with the latchable address lines of the ISA bus since I'm only working in the first MB and early address decoding wouldn't help anything. My understanding is that as long as the comparator asserts MEMCS16# immediately upon matching an address on the lower address bus, the system will respect the signal and only perform word transfers on even addresses (or use the high byte of the data bus for an odd address.)

    I'm only just learning the details of ISA, but according to: http://www.hardwarebook.info/ISA#16_...state_shown.29 it seems like this approach will work. Can anyone think of a reason why it wouldn't? There is no requirement to support 8-bit memory accesses on an AT bus, correct?

  2. #2
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    I'd like to make an ISA ROM card that supports 16-bit access to the option ROM.
    Silly of me to ask, but why?

  3. #3

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    Quote Originally Posted by Chuck(G) View Post
    Silly of me to ask, but why?
    As you probably know, many 16-bit ISA cards only assert MEMCS16# based off the early address decoding on the latchable address lines. This limits them to a 128kB resolution, essentially "forcing" the entire 128kB region to 16-bit accesses when used. My AST Rampage Plus 286 is one such card. You can force regions of UMA (A+B and or C+D segments) to 16-bit using switches on the REMM.SYS driver. Because my turbo AT motherboard maps the system ROM into the E segment, if I want to use EMS I am forced to place the page frame in the C or D segments. Thus, if I want to have 16-bit access to my EMS page frame, I have to have 16-bit support for *everything* in the C and D segments. The VGA ROM is no issue, it supports 16-bit access via DIP switch, but my SCSI card's ROM is 8-bit only. So I decided to relocate the SCSI ROM off the card onto this creation.

  4. #4
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    Quote Originally Posted by maxtherabbit View Post
    As you probably know, many 16-bit ISA cards only assert MEMCS16# based off the early address decoding on the latchable address lines. This limits them to a 128kB resolution, essentially "forcing" the entire 128kB region to 16-bit accesses when used. My AST Rampage Plus 286 is one such card.
    I wouldn't say many. It's only true of cards that are zero wait capable such as 16-bit XMS cards for a 286 like your Rampage. If you assert MEMCS16# early enough - before any of the memory strobes go active, the memory transfer will only take 2 bus clocks. You can assert MEMC16# after memory read/write strobe assertion to get only 1 wait access in combination with ZWS#. Since asserting MEMC16# early cannot be qualified with any of the memory strobes, it must be done based on LA23 - LA17 alone. I can't imagine any card would do it on LA[23:20] = 4'b0000 under any circumstance aside from conventional memory backfill.

    Again only for zero wait memory. MEMCS16# is sampled at two different points in the bus access cycle.

    Also, I'm with Chuck, why 16-bit option ROM?
    "Good engineers keep thick authoritative books on their shelf. Not for their own reference, but to throw at people who ask stupid questions; hoping a small fragment of knowledge will osmotically transfer with each cranial impact." - Me

  5. #5

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    Quote Originally Posted by eeguru View Post
    Also, I'm with Chuck, why 16-bit option ROM?
    the same post you quoted also explains why... I'm trying to get the SCSI card and Rampage to coexist in the same system with 16-bit access to the page frame

    when the AHA-1542B is doing bus master DMA, it assumes all memory out side of the A and B segments of UMA to be 16-bit, so the page frame must have 16-bit access to support first party DMA from the SCSI HBA

  6. #6

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    Quote Originally Posted by eeguru View Post
    You can assert MEMC16# after memory read/write strobe assertion to get only 1 wait access in combination with ZWS#.
    So if I wait until SMEMR# is active and a matching address on A15-19 hits the comparator to assert MEMCS16# like I had planned to, I would also need to assert NOWS# to prevent an additional wait from being inserted to read the ROM? (Assuming I use a fast modern ROM) And that's pretty much it right?

  7. #7
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    I'm trying to explain that you don't have to qualify 16-bit on 128K boundaries. That's only for 0-wait. You can make a single word address 16-bit anywhere in lower ram just by asserting MEMCS16# within a half bus clock after the memory strobes are asserted with the address fully latched and qualified. If the AST card is asserting MEMCS16# early on an entire lower double segment - essentially deactivating the bus-steering logic for 8-bit devices mapped in those segments - it's behaving badly. Surely there is a 0-wait enable switch you can turn off?
    "Good engineers keep thick authoritative books on their shelf. Not for their own reference, but to throw at people who ask stupid questions; hoping a small fragment of knowledge will osmotically transfer with each cranial impact." - Me

  8. #8

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    Quote Originally Posted by eeguru View Post
    I'm trying to explain that you don't have to qualify 16-bit on 128K boundaries. That's only for 0-wait. You can make a single word address 16-bit anywhere in lower ram just by asserting MEMCS16# within a half bus clock after the memory strobes are asserted with the address fully latched and qualified. If the AST card is asserting MEMCS16# early on an entire lower double segment - essentially deactivating the bus-steering logic for 8-bit devices mapped in those segments - it's behaving badly. Surely there is a 0-wait enable switch you can turn off?
    Yes, I understand you don't have to qualify 16-bit on 128k boundaries, and you may find this silly, but I'd rather throw $20 at building a ROM card than lose 0-wait on the Rampage. Even if I did disable the 0WS on the memory card, the documentation for the driver leads me to believe that it would still assert MEMCS16# based on early address decoding.

    remm.jpg
    Last edited by maxtherabbit; September 7th, 2019 at 11:13 AM.

  9. #9

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    @eeguru One thing I'm still not clear on based on what you said - if a device does assert MEMCS16# early, does NOWS# also have to be asserted to achieve zero-wait? Or does the system assume 0-wait when it samples MEMCS16# the first time? Conversely, if you assert MEMCS16# after the memory strobes are active, what affect does asserting NOWS# have if any?

  10. #10
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    That clarifies it a little. But it seems the problem is exactly how I stated it. The AST card is asserting MEMCS16# already for the designated lower memory segments - which disables the bus steering logic for any 8-bit devices in that area. So if you are just trying to solve your issue and not a generic one with a 16-bit option ROM card, you don't have to care about MEMCS16. The AST card is handling that for you. Even it were never asserted, your 16-bit card would still work with broken 8-bit steered accesses. If you are trying to make it generically useful outside of the AST case, then yes, just qualify your card CS with SA19 on down and the 8-bit SMEMR signal (lower 1M only) - optionally feeding it back to MEMCS16#.
    "Good engineers keep thick authoritative books on their shelf. Not for their own reference, but to throw at people who ask stupid questions; hoping a small fragment of knowledge will osmotically transfer with each cranial impact." - Me

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