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Thread: Imsai 8080 cannot examine to RAM adress...

  1. #21

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    Quote Originally Posted by Jan1980 View Post
    Sorry, i was on the false pin with psync. I have to say, i bought the logic analyzer before a few weeks and it´s the first time to work with it.. I´ll now check again the databus. Psync goes from low to high and not from high to low. What do you think about that ?

    Attachment 56504

    So, C3 and the MSB and LSB are there. I think, there is something wrong in the 8t97 area ?!

    THX

    Jan
    I think it was an error in the drawing. It is a PSYNC\ so falling signal is correct as you are seeing. I posted before you. Are you saying you see the correct C3 and address bits on the data lines? It is PSYNC positive on the mother board.It is inverted once to U13-8.
    Dwight

  2. #22

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    U18-12 looks like Id' expect it to. I think the 8T97 is fine.
    Dwight

  3. #23

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    Hello.

    Ok. But now, i damaged the plug from the flat cable to the cpu board. I ordered a new one. When it is installed i´ll check the things you said.

    THX

    Jan

  4. #24

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    Quote Originally Posted by Jan1980 View Post
    Hello.

    Ok. But now, i damaged the plug from the flat cable to the cpu board. I ordered a new one. When it is installed i´ll check the things you said.

    THX

    Jan
    You can disconnect the cable with the CPU card in place and run the test I asked for. In fact, I think we can complete the diagnosis. At most, you will need some wire and a few resistors of about 2K to 5K someplace and maybe some some 1K resistors.
    I may need to know which CPU card you have? We are really close to solving it don't quit now. You can replace the cable later.
    Dwight
    Last edited by Dwight Elvey; October 7th, 2019 at 06:20 PM.

  5. #25

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    So, i checked something. There are cables on the back of the pcb. I checked them with manual, they are correctly !

    Then, i made your measurement. I switched on the imsai and pushed examine.

    CH0 = U18 - 12
    CH1 = U10 - 12
    CH2 = U12 - 8
    CH3 = U14 - 6
    GND = U10 - 7

    imsai_no_examine2.jpg


    Then i connected logic analyzer to Databit 0 - Databit 7 on the CPU-card.

    CH0 = Bit 0
    CH1 = Bit 1
    CH2 = Bit 2
    CH3 = Bit 3
    CH4 = Bit 4
    CH5 = Bit 5
    CH6 = Bit 6
    CH7 = Bit 7
    GND = CPU GND Pin 2

    data_bits_while_examine.jpg

    I switched on imsai and pushed examine. I have set the adress to 00F0h. So, the 4 switches on the left side of the right side switches were up before starting. The Imsai makes something, but not the right steps. It does not look like 00 C3 00 F0.




    My CPU card is a MPU-A Rev-4

    Please take a look to the picture:

    MPU-A.jpg


    I swapped the 5 7405 behind the adress switches. No changes. What do you think ?

    THX

    Jan

  6. #26

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    The first set of values look really strange. First, just to make sure, you are triggering on channel 0 only.
    It looks like something is wrong in the decoder but I can't make sense yet.
    The data pins will look funny because there is a number of things going on, including CPU status. You have to have a channel connected to pDBIN as the value from the front panel is only valid while pDBIN is positive and even then the leading edge may be a little off. There should be 3 pulses of pDBIN, depending on what instruction it thinks it is doing( in other words C3 ).
    The first set of data is so wild, I'd like you to measure the following:
    channel 0 = U10-12
    channel 1 = U6-3
    channel 2 = U7-1
    channel 3 = U4-9
    Trigger on channel 0
    The same thing, hit examine.
    Dwight

  7. #27

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    Can you also verify that U11 and U12 are the correct devices?
    U12 should be a 7410 and U11 should be a 74LS10.
    I'm trying to figure how you could get the signals you were getting given the state of pDBIN. U14-6 looks like what U13-6 should look like. Are you sure you were on the right pins?? The other two signals looked right but U14-6 looked wrong?????
    Dwight
    Last edited by Dwight Elvey; October 9th, 2019 at 08:10 AM.

  8. #28

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    Looking at the first logic analyzer picture on post $41

    I'm going to go forward with assuming Ch3 was probing the wron chip and was looking at U13-6. Even if it wasn't on that pin, we can see that the strobe for the C3 was correct in the picture. We just need to understand why it didn't get through.
    This would mean the signal is really the inverse of pDBIN.
    The processor samples the data pins on the falling edge of the pDBIN signal, or in this display, the rising edge as it is inverted in the picture.
    It would seem that we have a number of possible problems.
    The logic is creating the correct emable to the 7405s for the C3 signal.
    Instead of the logic levels, I'd said we should probe in the previous post, I'd like to see the following:

    Ch0 = pSYNC
    Ch1 = U11-3
    Ch2 = D0
    Ch3 = D1
    Ch4 = D2
    Ch5 = D3
    Ch6 = D4
    Ch7 = D5

    Later we can swap D4 and D5 for D6 and D7. pSYNC will give us a known starting point and U11-3 will give us reference edged to determine what data the processor was receiving as input.
    Dwight

  9. #29

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    Hello.

    I checked again the pin´s from your schematic. Now, every signal is fine. Take a look:

    imsai_no_examine3.jpg

    Then, today i´ve got my ordering of logic chips and my new plug for the flat cable. I swapped all logic chips on frontpanel except 8T97N and 7427. One by one. But no changes. I cannot examine memory adress. I checked again every chip on frontpanel and on mpu-a card for right positioning. Everything fine !

    When i am on memory adress 00. I switched with the toggles C3 00 F0 and reset and made "single step" for three times. It jumps to memory adress F000, the 4 LED´s on the left side are on. So, there should not be any trouble with MPU-A card ?!

    I made your other measurement, expat U4-9. I have no access to this pin, i would have to desolder a toggle switch.

    imsai_no_examine4.jpg


    THX for your help !

    Jan

  10. #30

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    So, i made also the measurement from your last posting. But with all data lines. My logic analyzer has 16 channels.

    Ch0 = pSYNC
    Ch1 = U11-3
    Ch2 = D0
    Ch3 = D1
    Ch4 = D2
    Ch5 = D3
    Ch6 = D4
    Ch7 = D5
    Ch8 = D6
    Ch9 = D7

    imsai_no_examine5.jpg


    What do you think about this picture ?

    THX

    Jan

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