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Thread: New Version of RLV12 Emulator

  1. #1
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    Default New Version of RLV12 Emulator

    Hi,

    I'm planning to build a next generation RLV12 Hack for the Q-Bus. The current version is working pretty well but it has its quirks. Most importantly the SD-Card and the programming interfaces for the CPLD and the MCU are not very accessible when plugged into the Q-Bus or a card cage. Another issue for others to build it seems to be the use of fine pitch devices like the CPLD in a TQFP-100 package. Then it makes use of DS8837 devices in SMD which are very difficult to find. And one last point was the implementation of DMA. As it is for the moment and due to insufficient resources in the CPLD DMA uses a handshake between the CPLD and the MCU. That is the CPLD controls the DMA access but when it comes to the data transfer the MCU must send or retrieve the 16-bit word. This makes the DMA cycle longer (approx 3usec) than necessary (typically less than 1usec).

    The first issue will be addressed by a second break-out PCB. The PCB will go to a break-out panel which can be attached to a customized mounting plate as used for a BA23 or BA123 chassis. This break-out panel contains the SD-Card slot and the programming interfaces (ISP and JTAG). On the breakout board you also find the serial interface to the console of the RLV12/Hack and by adding a DB-9/25 to the mounting plate you can include direct access to the console of the emulator. I have now been able to successfully test a ribbon cable between the MCU and the break-out of 50cm running at the maximum speed for the MCUs SPI interface. Longer cables probably will need a reduced SPI speed, but tests have not shown any noticable performance impacts when running at half the speed.

    Then I have changed the interface logic between the CPLD and the MCU so it requires less pins. Thus I only need 64 pins on the CPLD, which would allow to use a PLCC-84 package for which through hole sockets are available. So it is very solder friendly.

    Instead of the DS8837 I will use the trick already used on my Q-Bus Memory board and replaced them with 74HC4049 devices operated at 3V3.

    By adding an additional CPLD I could offload some features from the main CPLD and as a result I have now sufficient resources to let the DMA run at maximum Bus Speed.

    However I did not replace the DC005 bus transceiver for the data bus. They are extremely convenient when interfacing with a bidirectional 16-bit Bus of the CPLD or in other words they save a lot of pins on the CPLD.

    The bus interface thus will use DC005 (aka C2324N), but I have seen that from time to time they pop up on ebay.

    Except for the 3V3 voltage regulator, the 4 bus termination resistors and the decoupling capacitors everything will be throughhole. The breakout board however makes use of a SOIC-14/16 devices and a SMD SD-Card cage. So some soldering skills are still needed, but nothing challenging.

    I wanted to know if there are any other suggestions what I should inlcude or add to a RLV12 Emulator.

    As with the RLV12/Hack this will be a Q-Bus dual-width card that emulates a RLV12 controller with up to four drives.

    Peter

  2. #2
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    Default

    top.jpg

    Just a small update to my initial plans. As already mentioned not using DC005 Q-Bus transceivers would need 16 more pins on the board logic side. However as it suddenly occurred to me, by rearranging the read and write registers, that is by strictly placing all write registers in one CPLD and the read registers in the other CPLD this would not be an issue as this does not increase the number of pins required per CPLD as I will have dedicated read data and write data paths. Therefore I decided to make a redesign of the new version. The result is now a "legacy free through hole only" design, with the exception of some very easy to solder SMD parts (resistors, capacitors and a voltage regulator). Here you have a image of the PCB I just ordered.

  3. #3
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    RLV12-Emulator-V2-soldered.jpg

    PCB arrived and first one finished soldering. The CPLD designs have been finished and MCU software is almost finished. So next step is to place the CPLDs and MCU and load the config and check if everything behaves as expected.

    Peter

  4. #4
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    Very nice!
    Member of the Rhode Island Computer Museum
    http://www.ricomputermuseum.org

  5. #5
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    Here you can see the debugging setup. As always a whole list of unnecessary programming errors had to be eliminated before it showed some success. But now after the last changes to the timing in the DMA it passes the built-in sefltests.

    IMG_3965 Kopie.jpg

    That is the device register IO works as expected and the DMA memory test works (it just writes 128kbyte of data and checks it that it reads back the same values using DMA). As you can see all interfaces are now brought to a 34-pin IDC connector, that is the ISP and JTAG to program the MCU and CPLDs in-circuit, the SD-Card interface signals (which basically is the same SPI interface as used for the ISP, plus some control signals) and the serial interface to the MCU to modify the settings of the emulator. Next I will test some disk functions using ODT and if this works a first boot will be tested. And of course I will place a description and documentation on my home page RLV12 Emulator Version 2.0

    Peter

  6. #6
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    Now boots into RT11 V5.3, RT V5.7 and RSX-11Mplus V4.6. I'd rather not tell how many stupid errors I had to fight (including a missing Grant-Continuity Card....)

  7. #7

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    Hi Peter,

    Congratulations on your successful PDP11 projects and thank you for making them available.

    I am interested in building some of your RLV12 V2 Emulators for use in my Qbus PDP11s.

    Will you be adding the Eagle PCB design files to your website soon? (I could only find your original single board RLV12 Emulator design in the Download section)

    Keep up the great work,
    Leon Byles

  8. #8
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    Hi Leon,

    Thanks.

    I'm currently preparing the download page for the RLV12 V2 Emulator and will include all files, i.e. Eagle, Gerber, ASM source, MCU HEX, CPLD Source and CPLD JEDEC files. Soon is relative, but I expect to be ready by end of this month.

    Peter

  9. #9

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    Thanks Peter.

    No pressure. All good things are worth the wait.

    Cheers,
    Leon

  10. #10
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    I just updated the download section with a RLV12 Emulator V2.0 post. You can download all files.

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