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Thread: What's with FDD cable termination?

  1. #11

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    74 series logic also has 5.5V as the max recommend operating voltage for inputs, I'd think if the supply was going over 5.5V there would be other issues

  2. #12
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    You're not following. If the logic level from the drive is higher than the supply voltage to the PSoC, the datasheet says that you're going to have problems.

    This is not the case with traditional "5V tolerant" 3V logic.

    Read the datasheet, particularly the footnotes.

  3. #13

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    The STM32 parts will have similar issues if you use the internal pull-ups. You should have them as floating inputs and open drain only for the 5V tolerant I/O. This is documented in the specs. If you need any particular levels, you can use pull up resistors. The floppy drives should already have that but it doesn't hurt to use additional pullups. I've seen some systems use Thevenin terminators instead of simple pullups. For these you need a pullup resistor or they will not work. These are typically 330/220 R-packs. With these, the inputs would float at 2V without something driving them. This may or may not be a high for a TTL input.
    Dwight

  4. #14
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    ...which is why it's always a good idea to have a layer of true TTL-compliant logic between the MCU and any externally-powered device. IIRC, most TTL datasheets specify an absolute maximum of 7V or so on inputs.

    When you're doing a commercial design, "it works for me" is not always the most sanguine approach.

  5. #15

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    Quote Originally Posted by Chuck(G) View Post
    You're not following. If the logic level from the drive is higher than the supply voltage to the PSoC, the datasheet says that you're going to have problems.

    This is not the case with traditional "5V tolerant" 3V logic.

    Read the datasheet, particularly the footnotes.
    I see what you're saying now, buffering it seems like the thing to do

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