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Thread: Lo-tech XT-CFv3 versus Texelec's "Lo-tech ISA XT CF Adapter rev. 3"

  1. #21

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    Quote Originally Posted by Eudimorphodon View Post
    Strictly speaking even in 1977 ...

    FWIW, I was aware of Lo-Tech's statement about their products' "open source" status when I made my initial post and, to emphasize, I would *strongly* recommend respecting their wishes by not just literally ripping off their PCB artwork and schematics unchanged and selling your own literal copies. If you plan to incorporate the underlying design into a product that serves a different niche or evolves the feature set in some substantial way then you should legally be in the clear but at the very least give credit where credit is due. (And also, presumably, carry on with "open-source"-ing your updated version.)
    Thanks Eudimorphodon for the run-down on that. Yeah I wouldn't want to take on a (more than I could use myself, type of) production run without (a) the creator's blessing and (b) without knowing some of the potential pitfalls that came about when it was first produced, as there might have been more unknowns than just the CPLD sourcing -- which Chuck brought up -- with the CPLD no longer being actively manufactured.

    So the CPLD sourcing might be one issue, and there might be others, the reason why TexElec is only producing the 2nd variant (attachment #2 from the first post in this thread).

    At any rate, I messaged James what his thoughts were and maybe some of the details about production since this thread here http://www.vcfed.org/forum/showthrea...ur-Vote/page32 showed a lot of promise in the first two years of development and then went silent since 2013.

  2. #22
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    Quote Originally Posted by maxtherabbit View Post
    Well according to their own license, it is open source. However they stipulate no commercial use.
    I know James' intent is altruistic. However I'm not sure he has standing to make this claim. You can trace all the <x>-IDE designs at least as far back as Tilmann Reh's GIDE design. To evolve the Lo-Tek design into something slightly new and better isn't much different than what anyone did in the chain leading up to it. Now a blatant rip-off of artwork and/or code with no attribution is just plain wrong (aka China clone-sellers).
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  3. #23

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    Quote Originally Posted by Chuck(G) View Post
    I'll mention that it was a sad day when Xilinx dropped the XC95 5V series. I've still got a bunch unused, but given that there aren't any more made, I don't know what to do with them. Includes the XC95108 in 84 pin PLCC as well as the smaller ones.

    The 108s could be cobbled up to make a PCI interface.
    I think the XCR3XXX series is still in production, and offers some advantages.
    - lower power by quite a bit
    - 3.3V device that maintains 5V logic compatibility
    - can buffer 3.3V devices into a 5V system

    XC2CXXX series doesn't support 5V operation so not really usable in vintage PC stuff.

    Seems like CPLDs have gotten to the end of their evolution more or less. No one seems to be motivated to try and make a better one.

  4. #24
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    It's still a 3.3V device, which means an added LDO regulator, so board changes. I'm not so sure about a 3.3V device being able to drive a legacy ISA bus, assuming that said bus has 5 cards plugged in. So, probably a buffer as well. More changes.

    But you're right--CPLDs, like GALs are old devices--and even more so, 5V logic. Integration has pretty much rendered them obsolete.

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    Quote Originally Posted by eeguru View Post
    I know James' intent is altruistic. However I'm not sure he has standing to make this claim.
    It's not my personal thing but it's my vague understanding via osmosis that drama related to "stolen" designs is a thing in the music synthesizer field. (Supposedly it's bad enough that at least some enthusiasts feel like they're walking on eggshells whenever they publish a homebrew circuit because someone will inevitably scream that they "stole" it from so-and-so even if it's something relatively simple and likely to happen via convergent evolution... but, again, I don't have enough exposure to confirm anyone's guilt or innocence or how much of a problem it really is.) Hopefully things don't get to that point.

    With the ROM code published under a GNU license you can certainly put the normal restrictions on commercial reuse of that, IE, you're not allowed to "sell" it, you can only redistribute it under the condition that you make the source available and contribute back any changes/improvements, but with un-patent-able hardware I'm pretty sure your only legal recourse is to try to keep your implementation a secret if you really don't want someone churning out a circuit-exact copy commercially. (And, as noted, you could undoubtedly ding them if they used a registered trademark of yours, and probably, or at least possibly, get them if they literally photocopied your PCB layout, although that's more of a stretch and would probably involve serious lawyer-bucks to pursue.) Honestly the one big rule in play here is "Don't be a d***". It should be obvious that stealing someone's PCB artwork to specifically turn out low-budget knockoffs which cannibalize their business falls into that category. Unfortunately "guilt" isn't enough to stop some people, and it sucks.

    Personally I've made some homebrew boards that incorporate an XT-CF-Lite design on them that isn't a full copy of anyone's (the layout is for the Tandy Plus Bus, not ISA, it's split across two physical PCBs, and the ROM decoding in particular is completely different, it's merged with a system RAM expansion). I don't think I'm ever going to end up selling them in any serious way but I did try to clearly denote on the silkscreen that the code and interface design was derived from the XTIDE project and some of the individual people who's schematics I took heavy inspiration from. That seems at least the minimum someone can do when trying to play fair.
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    Quote Originally Posted by LegacySystem View Post
    Lastly, other than through-hole versus surface-mount assembly, what are the changes from LoTech's XT-CFv3 versus the Texelec version that is currently offered for sale from Texelec?
    The original XT-CFv3 design can be configured to use DMA, which makes it the fastest XT-IDE variant you can put in an XT-class system. I can read 300+ KB/s from the prototype James sent me for testing, and we even dialed the bus contention to go even higher but had to back it back down because it started to interfere with a Sound Blaster trying to play sampled audio at the same time. The speed, and the integrated CF slot design, make it my most cherished XT-IDE variant out of all of them.

    For people running 286s and higher, the DMA advantage is less, and in fact I think the break-even point between DMA and REP INSW is somewhere around 12MHz, so if you are running 12MHz or faster, the DMA advantage does not apply.
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    Quote Originally Posted by Trixter View Post
    For people running 286s and higher, the DMA advantage is less, and in fact I think the break-even point between DMA and REP INSW is somewhere around 12MHz, so if you are running 12MHz or faster, the DMA advantage does not apply.
    Out of curiosity, how does the DMA performance compare to PIO with a V-20? (Or, for that matter, what if you have both DMA and a V-20?) I realized I'd never benchmarked my XT-CF-Lite at 4.77mhz; with my 1000 HX clocked down to slow mode I get between 380-408K/s, depending on the benchmark. (That compares to between 480-550K/s at 7.16mhz.) Granted, swapping an 8088 for a V-20 might not be for everyone.

    Of course, even the 200k-ish a second you can get with an 8088 is still at least half again faster than most real XT hard drives.
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    I never benchmarked with a V20. If you have a V20 and you're clocked to slow mode, I'd say 400KB is exceptional.
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  9. #29
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    Incidentally a 4.77 MHz PCjr JR-IDE with Mike and Jeff's BIOS runs about 330 KB/s raw rate and about 300 KB/s in terms of file payload at the OS level. With my new optimized routines, it's over 400 KB/s raw. The in-system benchmarks running on DOS show incorrect rates on the Jr. I think it is due to something weird in the timer tick processing. I only discovered this after emulating an IDE device with a RPi and measuring the raw block rate pushed or pulled using Linux timers. But the JR-IDE maps the IDE data register at 512 continuous addresses in upper memory (alternating upper latch / lower pass-thru) so a REP MOVSW / CX=100h can be used on a vanilla 8088. It's the fastest way to do PIO - but likely still shy of DMA speed on lower end machines. On higher processor speed machines where the 8037 is still running at 5 MHz, it may be the fastest.
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  10. #30
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    Quote Originally Posted by Trixter View Post
    I never benchmarked with a V20. If you have a V20 and you're clocked to slow mode, I'd say 400KB is exceptional.
    This is the machine that has the SRAM-based memory expansion card with no DMA controller even present, maybe the lack of DMA memory refresh cycles benefits this one application to an abnormal degree. (In slow mode Topbench calls this machine a "6" and rates its closest match a 5150 with a V20; going by total cycle times of 8170 vs 8782us its optimistically about 7% faster.)

    This is of course running with the BIOS that specifically has the V20 support, the machine runs at about 3/5ths this speed with the 8088 BIOS.
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