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Thread: Circuit design questions

  1. #1
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    Default Circuit design questions

    Since I have been making new boards for my 8080 CPM 2.2 machine, I have a couple of design questions. They are in regards to pull up and down resistors.

    I'm using TTL logic, some standard and some LS.

    For an UNUSED INPUT that needs to be a logic high, I pull it up with a 1K resistor. If there needs to be more than one pull up per chip, I use the same pull up. If the unused input needs to be a logic low, I just ground it. A resistor here would increase the low voltage and may not be a logic low anymore. I think this is prudent, but is the resistor value appropriate (could I just pull the unused input up to +5 volts?) and how many unused inputs can be tied to one pull up resistor.

    Does this method of pull ups also work for inputs such as the set and reset of a 7474 D type FF?

    Then how should the value of Open Collector pull up resistors be calculated? Is is dependent on how many Open Collectors are tied together? Thanks Mike

  2. #2
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    So, TTL inputs are current sources, and TTL outputs are current sinks, open collector included. I know it seems a bit backwards that a TTL input sources current when the output pulls it low, but that is indeed the case.

    So, everything in you question turns on those two facts. You always pull up a TTL input, and you always do it through a resistor of a relatively high value, a few tens of K ohms. It is not recommended to tie it directly to 5V simply in case you ever need to use that input; with a pull-up resistor you can still use the input.

    For open collector outputs, the pull-up value is determined more by the application and by the current sink capability of the output, but a few tens of K ohms is typically in the ballpark; too high, and the input can be false triggered; too low, and too much current flows in the output transistor. TTL inputs can be tied together and pulled-up with a single pull-up of basically the same value. Paralleled inputs are actually what determines the fanout capability of a TTL gate; too many inputs connected, and you get too much current in the low side of the totem-pole or the output transistor of an open-collector gate.

    TTL inputs that need to be tied low should indeed be connected directly to ground; they're designed to work that way, since that's basically what the output low-side transistor does, thus the 0.8V low state (collector to emitter voltage of a saturated bipolar transistor).

    Open-collector outputs don't necessarily HAVE to have pull-up resistors IF they're connected to TTL inputs, but they are typically more stable if they are.

    Now, as to the values. The lower the value of pull-up, the faster the low-to-high transition will be, AND the greater the current in the output transistor. So the resistor value is partially determined by the speed you need from the open-collector output in the low-to-high transition.

    Pull-ups are required when interfacing to CMOS inputs, which do not source current.

    The main uses for open-collector outputs are when you want a wired-AND connection (negative logic wired-OR), and when you want to drive larger currents or voltages which aren't available with the totem-pole output. Some open-collector outputs are rated to withstand 40V or more, so you can drive higher voltage things with them.
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  3. #3
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    All unused inputs must be tied to an appropriate logic level. You could use a higher value resistor if you have some handy, the idea is to stop noise from entering via the input pin.

    If the open collectors are all attached to the same signal net, then one resistor should suffice. The value depends on how fast (rise time) you need the signal to return to the unasserted state. The smaller the resistor the faster the return to the unasserted state, with the corresponding increase in power dissipated in the pull up resistor when the signal is asserted.

    Open collectors for different signal nets must have separate pull up resistors.

  4. #4
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    Texas Instruments have an excellent article on this very subject.

    In general NEVER connect an input DIRECTLY to VCC/+5V. Some families of TTL are fine, others will work, but could destroy the IC under certain conditions.

    For a useful primer, look at the schematics for your PDP-8 for how DEC tackled this subject.

    In general, the more TTL signals you have tied to a pull-up resistor, the lower the resistor value should be.

    I will try and find the TI reference for you.

    EDIT: Here’s one http://www.ti.com/lit/an/slva485/slva485.pdf and here’s the other https://www.ti.com/lit/an/sdya009c/sdya009c.pdf.

    Dave

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    I have a drawer of 2.2K 1/8W resistors for just this purpose. It's just good practice to tie an input to a known level. 2.2K also works as a load for an OC LSTTL output in most cases.

  6. #6
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    Quote Originally Posted by daver2 View Post
    Texas Instruments have an excellent article on this very subject.
    ...
    Thanks for posting the articles; that says it better than I did.
    --
    Thus spake Tandy Xenix System III version 3.2: "Bughlt: Sckmud Shut her down Scotty, she's sucking mud again!"

  7. #7
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    The TTL Cookbook by Don Lancaster is also a decent book to have on your bookshelf
    Crazy old guy with a basement full of Pentium 1 laptops and parts

  8. #8

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    One of my favorite 74 series TTL IC pcbs , used about 65 of them, is Atari's Arcade Pong game.

    They generally had two 1k pullup resistors for ALL the unused IC inputs, or inputs that needed to be tied high, for the whole pcb, they called it the "+3V" line. Although the schematic didn't reflect this showing separate resistors here and there as well, that are not actually on the pcb. As I recall the occasional IC input was left floating too, to assume a less noise immune logic high.

    There is one interesting consequence of this, it is possible with an IC failure to get a pulse coupled onto the "global pullup" connection causing chaos, I have only ever seen this once, so if you get a complex or bizarre fault where there is one pullup source for dozens of TTL's, it pays to look at the pullup line with the scope.

    I liked the Pong design so much I designed my own pcb for it and combined it with an Apple II monitor:

    http://worldphaco.com/uploads/ARCADE_MINI-PONG.pdf

  9. #9
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    Quote Originally Posted by Hugo Holden View Post

    I liked the Pong design so much I designed my own pcb for it and combined it with an Apple II monitor.
    Hugo,

    Back in the late 70's while still on active duty, I had a Coleco Pong game. Would that be any relation to the Atari version.

    Tom
    Surely not everyone was Kung-fu fighting

  10. #10
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    Coleco's (and a bunch of other manufacturers) Pong consoles were based on various "Ball and Paddle" parts like the AY-3-8500. This was basically a functional clone of the chip Atari cooked up for their own home version of Pong about a year earlier but not strictly "related" to it.
    My Retro-computing YouTube Channel (updates... eventually?): Paleozoic PCs

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