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Thread: Sun 3/80: Bad "decode1" chip: Need system schematics or at least pinout.

  1. Default Sun 3/80: Bad "decode1" chip: Need system schematics or at least pinout.

    I've a Sun 3/80 which whilst in storage developed a fault in the decode1 chip meaning that it can't output the /RD signal to the serial SCC. Given that this is required at an early stage in the boot the machine just flashes the LED briefly and sits there polling writing to the status register and never getting the correct data back.

    Seeing these chips are not available I'm looking at the possibility of recreating it using discrete components, well a GAL or two. However, to do this i need at the very least a pinout of the chip and preferably a complete machine schematic.

    The 3/80's architecture is close enough to the 3/60 to understand what the chip is supposed to be doing but too different to be actually useful.

    So, does anyone have a schematic or know if one exists?

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    Is the chip in question physically the same as the one in the Sun 3/60? I found the Sun 3/60's schematic on Bitsavers and the chip is literally just a 15ns PAL20L8. A 15ns GAL20v8 should work as a pin-for-pin compatible replacement... with the nasty proviso that without knowing the equations to program it reverse engineering it might be a massive pain.

    If it is just a PAL and it *mostly* works there are techniques for trying to brute-force what it did before. (If I'm understanding the datasheet it looks like the 20L8 has only combinational logic, no registers, so it would be amenable to those techniques.) But if it is truly dead then you're probably not going to get anywhere with that.
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    ... maybe there's enough information in this Sun-3 Architecture Manual to suss it out? Just thumbing through it I think it kind of gives me a glimmer of an idea why the signals that go into that PAL on the 3/60 are what they are, and it *kind* of implies that details like the SCC address are consistent across the architecture type... except I guess a 3/80 is technically a 3x, not a 3? Not sure how much difference that makes.
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    ... (yeah, one more) I can't for the life of me find a high-res enough picture of the Sun/3 motherboard to make out which chip is decode1, but I can see that's it's basically all PLCCs instead of DIPs. There's a chance at least that "decode1" is just a PAL20L8 in PLCC instead of DIP and has the same programming as the 3/60 version. (DIP24 PAL/GALs translate to PLCC-28.) What are the markings on it?

    Edit: There's an archive of all the PALs in a 3/60 here:

    https://www.sun3arc.org/PALs/Sun3_60/pals.phtml

    I don't know that the magic incantation is to convert those numbers into chip positions, though. (The schematic says "decode1" is U311.)
    Last edited by Eudimorphodon; May 7th, 2020 at 02:48 PM.
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  5. Default

    The Sun 3/60 and Sun 3/80 are very different in many ways.

    The 3/60 uses a 68020 with a proprietary MMU. It's also made of a lot of discrete logic. "decode1" is just a PAL and has only 4 address lines going to it.

    The 3/80 uses a 68030 and hence doesn't have the other MMU, but it does have a DVMA chip which complicates things. It's also more integrated using a number of VLSI chips, which include the "decode1" and "decode2" chips (there's no "decode3"). "decode1" is a PLCC-44 packaged VLSI custom chip, and from the scoping, has 8 or 10 address lines plus a couple of control lines from the DVMA chip (via a 244 buffer), so it's very different.

    So, although you can get hints from the 3/60 that's all they are. Sun had 3 years of development time to refine and change the design.

    With regards to the address lines the chip is seeing, there is no guarantee that these are the same address lines the CPU is seeing, they could be generated by the DVMA chip instead.

  6. Default

    By the way, here's a high-res image of the Sun 3/80 motherboard. The "decode1" chip is in the bottom right above the large VLSI "reset" chip.

    http://www.lingula.org.uk/~steve/share/sun3-80-mb.jpg

  7. Default

    Unfortunately the 3/60 is very different in this way to the 3/80.

    The 3/60 is a three year older machine which uses a lot of discrete components, doesn't have DMA, uses a 68020 with proprietary MMU.

    The 3/80 uses a 68030 with the standard MMU, and has a full virtual DMA subsystem.

    You can get hints from the older system but it's very different.

    I've been doing some more investigation today. Only one pin actually sees the real address bus and that's looking at A9, i.e. 0x2000. This differentiates between the two SSC chips (SCC1 is at 0x62000000 and SCC2 is at 0x62002000). Other than the four lines to the two SCC chips there are 5 which go to "decode2", two to an LS244 near the DVMA chip, one goes to the DMACTL chip and a few go to the RESET chip. I've not found where the rest go.

    Without a schematic I think I'm sunk.

    Anyway, here's an image of the motherboard. The decode chips are above the large RESET chip in the bottom right.

    http://www.lingula.org.uk/~steve/share/sun3-80-mb.jpg

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