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Thread: PETunia's Repair Log

  1. #61

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    Quote Originally Posted by dave_m View Post
    My PET has much less ripple. See my message # 35.
    re: Ripple

    [I'm using http://www.zimmers.net/anonftp/pub/c...01/320008.pdf]

    I got out my trusty MASTECH MAS-343 DMM....

    Resistance: Case to Pin 21 of J1...J8... <1ohm; basically dead short; I also measured at the GND pins of H8 & H9 for good measure... same result.

    Then measuring voltage on DC between the TP-1, TP-2, TP-3, TP-4 to chassis...

    5.08V, 5.13V, 5.14V, and 5.00V

    and on AC range...

    .008V, .008V, .008V and .008V

    Not sure why that doesn't tally with the earlier scope trace...

    If I AC couple to one of the TPs then I see spikes at 1MHz... maybe that's more an indication of some inductive probe coupling to the 1MHz stuff rather than VR instability?

    VR_AC_Coupled.jpg

    I'm a little confused about my earlier readings made with my Aneng AN8008 meter... I tried to repeat them and on AC (displays AC True RMS in display) the screen now alternates between 0.00 and 2mV... very odd.

    Anyway the numbers above look OK

  2. #62
    Join Date
    Jun 2012
    Location
    UK - Worcester
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    3,963

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    Does your oscilloscope have an earth connected to the probe screen that you are connecting to the PET's 0V/GND?

    If so, what you may actually be measuring is a mains earth loop as opposed to a real signal...

    I will look at the checksum issue tonight when I can get my hands on my development machine (the wife uses it during the day). However, the @ in KBD is definitely an error. Probably nothing to do with the 6502 reading/writing data from/to the video RAM - as it has already performed this test and deemed it OK. Possibly something between the video RAM and the display circuitry.

    Yes, there is something amiss with the PSU ripple somewhere (be it real or imaginary). This is an area to concentrate on.

    One suggestion, get a BIG capacitor and put it in parallel with the existing reservoir capacitor and see if that cures your problems. If it does, replace the reservoir capacitor.

    As you have found, looking at combinatorial logic with an oscilloscope sometimes is not helpful. Suggestion, if you have a two channel capability, use one trace as a reference so that we can align the traces together (for example, put the output pin from the gate onto one channel of the scope and then take one picture with one input pin and a separate picture with the other pin - both having the common trace). However, again, the little glitches are expected behaviour. The CPU will not see these glitches, as the address and control busses will be changing, and the CPU will only read the data later in the cycle - once everything should have stabilised.

    Dave

  3. #63

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    Quote Originally Posted by daver2 View Post
    Does your oscilloscope have an earth connected to the probe screen that you are connecting to the PET's 0V/GND?
    I suspect it does.


    Quote Originally Posted by daver2 View Post
    One suggestion, get a BIG capacitor and put it in parallel with the existing reservoir capacitor and see if that cures your problems. If it does, replace the reservoir capacitor.
    I will try that.

    Quote Originally Posted by daver2 View Post
    However, again, the little glitches are expected behaviour. The CPU will not see these glitches, as the address and control busses will be changing, and the CPU will only read the data later in the cycle - once everything should have stabilised.
    That's a shame... I felt I might be on to something there... however to be honest I couldn't get a failure of operation of the H8 & H9 buffers to explain why the ROMS don't always produce the same checksums when running the tester since the ROMs are actually directly attached to the uP data bus D0..D7 not via BD0...BD7.
    I'm a bit worried about the number of times I am turning the PET on and off... maybe a reset button is in order?

    Dave

  4. #64

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    I'm not as concerned about the glitchy looking spikes. These look like issues with the scope probes grounding. The scope probes ground must be near where the probe is measuring, as although the resistance it low, inductance is not always that low.
    I'm a little more concerned that he has no keyboard. The @ instead of the B is also a little of some place. I'd have to look at the character ROM again but seems I recall the @ and B are only a single bit different.
    Dwight

  5. #65

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    I'd like to see some of the screen shots of G9, pins 15,14,13 and 12. ( G9 is the 74LS145 )
    These are the signals that should scan the keyboard. I believe we should trace down things we know are failing first. It may lead us to the other problems of things like the check sums. Speaking them can we get a lit of that actual numbers that sometimes fail. We need to see which bits are involved. If it is various bits, it is likely during the reads. If it is always the same bit, it is likely related to what causes the B>@ switching at the display.

    Also, it might be good to make the NOP generator as that may give us some indications. This is a good test of the generic health of the address generation and data bus.
    Dwight

  6. #66

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    The keyboard issue is entirely due to both PIA sockets and the VIA currently being empty. We previously established that originally the keyboard did not work but by putting the 6520 from B8 into G8 the keyboard works. I have re-populated the 6520 PIA into G8 and I get this... (B8 and A5 are currently empty)

    The KBD and K@D seems intermittent.

    I had H4 empty but have re-populated it now... so H4 and H7 are original ROMs, H1 (C000), H5 (C800) and H2 (D000) & H6 (D800) are new ROM replacements and H3 contains the tester.

    Gives...

    Capture1.JPG

    Pressing on a key makes the numbers change. F checksum back to 0CA4

    This is where we were some time ago...
    Last edited by Nivag Swerdna; August 5th, 2020 at 07:26 AM. Reason: delete incorrect thumnails

  7. #67

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    so.... I populated I1..I8 and J1..J8 so all 6550 RAM sockets now occupied and ran the tester... (VIA and failed PIA sockets still empty)

    Checksum screen was as before although the KBD changed to a K@D somewhere during the countdown...

    ... and then...

    Capture.JPG

    Says... MEM FAIL 1 0 1147 08 F7!

  8. #68

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    I swapped I5 and J5 with I8 and J8 and got...

    Capture2.JPG

    Now I think I am going to stop and ponder... I only have one spare 6550...

  9. #69
    Join Date
    Feb 2009
    Location
    Southern California, USA
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    2,974

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    Quote Originally Posted by Nivag Swerdna View Post

    This is where we were some time ago...
    Yes, with PETTEST installed, all seems fine. If PETTEST passes with all PIAs and the VIA installed, then we could go to the NOP address tester, but by passing ROM sum checks, it is unlikely there is an address issue or a data bus issue for that matter. The system should boot.

    I wish we could test the PIAs and VIA. Has the EDIT ROM (H3) passed a sum check? I think you tested it early on. The H3 socket has seen a lot of action and it may be a candidate for replacement.

    What is the next step, guys?

  10. #70

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    One last thing for today....

    I replaced I8 with my last spare 6550... and got...

    Capture.JPG

    I don't know how to interPrET that

    I did notice that the RAM runs very hot and with my point and shoot IR thermometer I get readings between 48C and 52C! Quite alarming.

    I'm pretty sure one PIA is dead (since the keyboard test didn't work when it was in place).... probably best kept out? Shall I reinstall the VIA? (which I don't know how to test)

    re: H3... I read out the original 6540 using my chiptester and got an exact match rom-1-e000.901439-03.bin MOS / MPS 6540 / 015 4378A

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