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Thread: IBM EGA Card Clock

  1. #11
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    Quote Originally Posted by the3dfxdude View Post
    Is there an EGA diagnostics program out there? Actually, I am getting the the one long and three short beeps consistently now. So I think I'd like to try a memory test.
    See [here].

  2. #12

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    I can only run the EGA diagnostics telling the program that I do not have both monitors hooked up. Otherwise it will try to prompt for things on the EGA screen I cannot see.

    When I run only from the monochrome display, I got this message:

    ERROR -
    ENHANCED GRAPHICS ADAPTER 2401 S
    0 - DISPLAY ADAPTER AND MEMORY TEST
    FAILING GRAPHICS MEMORY 000052

    I don't understand this code. It would be nice to know if some level of writing/reading is working on the DRAM. But I am not sure on the DRAM timings being correct right now anyway. All seems to be pointing back to the sequencer. It is either bad or it is not being initialized correctly. One item that I forgot to mention, I found that the clocking mode register bit 3 controls a clock divide mode.

    I think I might try writing to a0000 or b8000 in debug.

  3. #13

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    So question on the EGA card. With it in the machine does it boot you to DOS? Is the display issue only when you start a program in EGA mode?

  4. #14

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    Yes. The machine will boot to DOS. The POST failure is in the tests performed by the EGA ROM. The machine proceeds and I can use the machine with a second display card, and right now I am using it through a serial terminal to be sure what I am seeing from the EGA card. (other video card removed)

    The EGA card's sequencer will be in a reset mode until programmed with the correct registers. The ROM will do this. Without the ROM, I can program EGA's mode 2 and CGA's mode 0 for comparison now. I can reproduce my original clock numbers in the mode 2. I picked trying CGA mode 0 (40 column) because this low res mode should match the timing numbers as if the clock divider is selected, and it does. But there is still issues with timing somewhere, including the DRAM. Also, while the dot clock is the correct frequency (7 MHz), VSYNC is oddly less than 60 hertz.

    One thing I would like to know on a working card is what the approximate clocking frequency coming in on pin 7 of the sequencer (SYNC) in the normal EGA configuration? It looks identical to HSYNC.

    Also, I checked IOW signal to the sequencer and CTRC, and looks fine. All the address, data, and external register ics seem to be fine.

  5. #15

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    This is my final collection of data. I suspect CCLK is out of spec due to something faulty with the sequencer.

    Mode HSYNC SYNC VSYNC DT CCLK
    At Boot No Rom None 397khz None 7.1mhz 795khz
    CGA Mode 0 13.9khz 13.9khz 53hz 7.1mhz 795khz
    EGA Mode 0 16.9khz 16.9khz 46hz 7.1mhz 795khz
    EGA Mode 2 9.7khz 9.7kz 26hz 8.1mhz 903khz

    Note: SYNC is an inverted form of HSYNC on my scope.

  6. #16
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    Quote Originally Posted by the3dfxdude View Post
    One thing I would like to know on a working card is what the approximate clocking frequency coming in on pin 7 of the sequencer (SYNC) in the normal EGA configuration?
    I modified the diagram at [here].

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