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Build your own PDP 8I, Part 2..

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    Hi All;

    I got some of the Power wiring done last night..

    001.jpg

    THANK YOU Marty

    Comment


      My - your construction looks mighty nice...

      I have started 'in earnest' entering the schematics into Logisim. As I was doing this - I am coming across all sorts of discrepancies. Some with the Lab manual descriptions of signal derivations, some with how the Lab manual signal derivations are implemented by the schematic etc. etc. etc.

      I am doing the 'simple logic' for now (e.g. the registers and the bulk of the combinatorial logic dealing with the MUX and ALU control signals, decoding of the OPR instruction (group 1 and 2) and register loading).

      I was horrified by the logic for the register loading signals [e.g. MB(L)]. You need to be VERY careful with the type of gate in the /CLEAR side to prevent you getting a very short 'runt pulse' that will not be seen by the registers (or may be seen only under certain circumstances). Are you actually using a 74L00 in this position?

      I agree with DDS - that some of this 'design' looks (and probably behaves) strange...

      I will post my logisim design when I have completed it, ironed out the bugs and it runs some of the diagnostics.

      PS: You don't need a bit slice processor for a microprogrammed design. My LD30 logisim implementation just uses a 7-bit loadable binary counter, some fast ROM and a couple of multiplexers and D-type latches.

      Dave

      Comment


        Hi All;

        Dave, Thank You for Your Answer, and willingness to enter this in..
        "" I was horrified by the logic for the register loading signals [e.g. MB(L)]. You need to be VERY careful with the type of gate in the /CLEAR side to prevent you getting a very short 'runt pulse' that will not be seen by the registers (or may be seen only under certain circumstances). Are you actually using a 74L00 in this position? ""
        YES, I have a few 74Lxx Ic's, even though with You mentioning it, I think I will put in a 7408, followed by a 74L00, Used as an inverter to lengthen it a bit more.. I will need to see what I have, to implement this /Clear signal..

        "" I agree with DDS - that some of this 'design' looks (and probably behaves) strange... ""
        Any Ironing out You can do, Please let me know about..

        ""I will post my logisim design when I have completed it, ironed out the bugs and it runs some of the diagnostics. ""
        Please post it,before you have Ironed out the Bugs, and I (at least) can see the progression and possibly the "why" of what You are doing or did..

        THANK YOU Marty
        Last edited by Marty; September 28, 2015, 09:34 AM.

        Comment


          A couple of ideas:

          1. In looking at the parts list in the Assembly manual I noted that of the IC's listed, every one was a plain vanilla 74nn except for one lonely 74Lnn. Nowadays anything that's being created using TTL pretty much defaults to the 74LSnn series. The internet was being difficult about when the 74LSnn series was released. My TI TTL Data Book is second edition copyright 1976 and the 74LSnn parts are in it. What dates I see in the LD12 materials are in 1974. Perhaps the short note in the Lab Manual about devices not yet readily available refers to the 74LSnn family?

          2. Speaking of dates in the LD12 materials, many of the schematics have dates on them. Some like LD12 Schematic.pdf page 5 have many. To me they're suggestive of revision dates. That bothers me because they suggest that bugs were found and fixed and the drawings updated, but nothing tells us what was changed or why. It would be helpful if any bugs or typo's found are documented here or on the nv8em website with the rest of the documents. Any useful information like lead names, IC types and location and pin numbers should be clear enough so that someone else 10 years from now doesn't have to debug this stuff all over again.

          3. There are some notations on the schematics I find puzzling. Referring again to the LD12 Schematic.pdf page 5 lower left corner is a gate, apparently on a 7430 that's also labeled A10. Are these IC's numbered in a coordinate fashion like row and column? If so I'm guessing the A10 inside the gate symbol is the location on the original design. If that's correct, what does the M16 just above the gate refer to?

          4. I'm also going to start tinkering around for the first time with Logisim. And I would appreciate it if any corrections you guys find that we and future tinkerers might need be documented here and/or on the nv8em site as well.
          "It's all bits on the bus, Cowboy! It's all bits on the bus!" -- Tom Beck, #1ESS Instructor, Southern Bell Opa Locka Training Center

          Comment


            Hi All;

            Thank You, DDS for Your suggestions..

            "" 1. In looking at the parts list in the Assembly manual I noted that of the IC's listed, every one was a plain vanilla 74nn except for one lonely 74Lnn. Nowadays anything that's being created using TTL pretty much defaults to the 74LSnn series. The internet was being difficult about when the 74LSnn series was released. My TI TTL Data Book is second edition copyright 1976 and the 74LSnn parts are in it. What dates I see in the LD12 materials are in 1974. Perhaps the short note in the Lab Manual about devices not yet readily available refers to the 74LSnn family? ""
            I have Plenty of the plain 74xx, so for now until I can get it working, and then try the LS.. At present it is not a speed thing, But, more than likely a TTL Load thing..

            "" 2. Speaking of dates in the LD12 materials, many of the schematics have dates on them. Some like LD12 Schematic.pdf page 5 have many. To me they're suggestive of revision dates. That bothers me because they suggest that bugs were found and fixed and the drawings updated, but nothing tells us what was changed or why. It would be helpful if any bugs or typo's found are documented here or on the nv8em website with the rest of the documents. Any useful information like lead names, IC types and location and pin numbers should be clear enough so that someone else 10 years from now doesn't have to debug this stuff all over again. ""
            I don't remember for sure, whether I have put all that I found here, or not.. I think I did..

            "" 3. There are some notations on the schematics I find puzzling. Referring again to the LD12 Schematic.pdf page 5 lower left corner is a gate, apparently on a 7430 that's also labeled A10. Are these IC's numbered in a coordinate fashion like row and column? If so I'm guessing the A10 inside the gate symbol is the location on the original design. If that's correct, what does the M16 just above the gate refer to? ""
            The M16 is the IC designation from the Externally Sorted List, and the A10 Refers to the Internally Sorted List..

            "" 4. I'm also going to start tinkering around for the first time with Logisim. And I would appreciate it if any corrections you guys find that we and future tinkerers might need be documented here and/or on the nv8em site as well. ""
            I think we can put updates here.. I don't know how to add them to the nv8em site..

            THANK YOU Marty

            Comment


              "The M16 is the IC designation from the Externally Sorted List, and the A10 Refers to the Internally Sorted List.."

              In your travels through the documentation. did you see any explanation for why the wiring list was presented twice, once "Externally Sorted" and once "Externally Sorted"? Externally and Internally with respect to what?
              "It's all bits on the bus, Cowboy! It's all bits on the bus!" -- Tom Beck, #1ESS Instructor, Southern Bell Opa Locka Training Center

              Comment


                Hi All;

                ""
                In your travels through the documentation. did you see any explanation for why the wiring list was presented twice, once "Externally Sorted" and once "Externally Sorted"? Externally and Internally with respect to what? ""
                "" once "Externally Sorted" and once "Externally Sorted"? "" I think You, meant once Externally Sorted and once Internally Sorted..
                Anyway, I have no Idea, That and so many other Questions, we just don't know the Answer to.. And can only guess at..
                My only guess is that one was earlier than the other, or they originally laid out the unit differently then the later unit.. Also, the Book mentions (I think) five other versions, before the book, so this would have been version number four, and (I think) they were encouraged to try different things and try different circuits out, looking for other/better ways of doing things..
                Possibly reading the Lab manual, the Memory Paper and the I/O paper might help, and reading through both books.. But, I doubt it..
                Also, remember that they got their Lab unit and most likely worked thru all of the Experiments on that Board, Wiring and un-wiring after each session.. Then, at the end of the School Year they took it home.. A fully (hopefully) functional PDP 8i clone..
                I don't know this for sure, that they took it home, But, how else would Mark Arnold have been able to keep His Machine..
                Here is a photo of today's progress..

                001.jpg

                THANK YOU Marty
                Last edited by Marty; September 28, 2015, 06:15 PM.

                Comment


                  "I think You, meant once Externally Sorted and once Internally Sorted"

                  Yep.... I was being called to dinner & typing faster than my brain could keep up with.

                  I'm going to throw a wild guess out there. Perhaps they started using some sort of CAD software that wanted to rename the IC's after they had already been working on the row & column system. That would give you one name used internally to the CAD program and another name used externally. It's really far out there but I can think of no other context with respect to the rest of what I've seen in the posted material that would answer "Internal and External with respect to what?".
                  "It's all bits on the bus, Cowboy! It's all bits on the bus!" -- Tom Beck, #1ESS Instructor, Southern Bell Opa Locka Training Center

                  Comment


                    Hi All;

                    I have started to wire up LD-8, I cannot wire up LD-9, until I get the 18 pin sockets, for the 16 pin Ic's, and a Cap..
                    But, its a start..
                    The sockets should be here about Monday..

                    THANK YOU Marty

                    Comment


                      Hi All;

                      I've decided to start part 3,

                      Here is the Link..
                      http://www.vintage-computer.com/vcfo...-PDP-8I-Part-3

                      THANK YOU Marty

                      Comment

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