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8 bit IDE (XTA) Replacement Project

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    #61
    Umm, wow! Nice drive collection. Those WD's sound just wonderful in my opinion. When mine feels like working it is a happy day. I understand the desire to be able to use them.

    Originally posted by vwestlife View Post
    Going the opposite way... could it be possible to add support for 8-bit IDE-XT drives to a modern XT-IDE interface card? The IDE-XT interface cards, like the Western Digital WD-XT150 shown below, are all very simple, with just a few off-the-shelf 74LS-series chips and a ROM.
    [/IMG2]
    I think Eudimorphodon is right that it would probably best to design a new card to make use of an original BIOS. It is not a complicated board. I expect you could actually run the WD BIOS on the Seagate card and vice versa. I was thinking I would design a card after the drive replacement was done. I thought some folks might want to be able to run a period bios. I kind of want to put one together right now. It would not take very long to do the schematic. I keep getting more pedantic in my board layouts with each new one I do, and so there is probably a solid couple of days of layout work to do.

    I do have my XT-IDE CF variant to start with: https://github.com/JayesonLS/ISA-Car...super-lite-1-2

    Comment


      #62
      Originally posted by vwestlife View Post
      Would it be possible to get a BIOS dump from this card? It would be very helpful. I have attached a text file which will dump out the entire BIOS range when directed into debug. If you zip up all the resulting ROM*.BIN files, I will be able to extract out the WD BIOS.

      Code:
       debug < dumpbios.txt
      dumpbios.txt

      Comment


        #63
        Originally posted by vwestlife View Post



        that's a beautiful sight, I had one of those drives as a kid and inserted the power connector the wrong way round - never did forgive myself for that

        in my defense the thing offered basically zero resistance to the physical insertion and it had +5 on the right which is the opposite of everything else ever

        Comment


          #64
          I could not help myself and started on an XTA interface card design. It was all going fine until I found this extra circuitry on the Seagate ST05X card for ~DACK. I must be misunderstanding something because it seems to do nothing. Can someone assist? The blue text is notes I added while trying to make sense of it.


          huh.png
          Last edited by JayesonLS; September 11, 2021, 05:55 AM.

          Comment


            #65
            Originally posted by vwestlife View Post



            I guess those are from this eBay listing, and the descriptions don't sound too promising. https://www.ebay.com/itm/154564470982

            One day Ali Express will offer a super low cost clear air setup... Then regular folks can take them apart to regrease bearings, etc.

            Comment


              #66
              I am not sure at this point whether this is actually something useful, but this is current WIP on an XTA interface card.

              XTA-Card-WIP.png

              XTA Card WIP Schematic.PNG

              Comment


                #67
                Originally posted by JayesonLS View Post
                I could not help myself and started on an XTA interface card design. It was all going fine until I found this extra circuitry on the Seagate ST05X card for ~DACK. I must be misunderstanding something because it seems to do nothing. Can someone assist? The blue text is notes I added while trying to make sense of it.
                I think I would have to sit down and write out a truth table for the whole thing. Is it there to make sure DACK is de-asserted when a read/write cycle starts (ior/iow goes low)? It kind of stinks of a hack they might have thrown on there to deal with a known implementation bug with particular motherboards or drives.
                My Retro-computing YouTube Channel (updates... eventually?): Paleozoic PCs Also: Blogspot

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                  #68
                  Attached is a dump of the Seagate ST-05X XTA interface card BIOS.
                  Attached Files

                  Comment


                    #69
                    Originally posted by Eudimorphodon View Post

                    I think I would have to sit down and write out a truth table for the whole thing. Is it there to make sure DACK is de-asserted when a read/write cycle starts (ior/iow goes low)? It kind of stinks of a hack they might have thrown on there to deal with a known implementation bug with particular motherboards or drives.
                    I plugged it into an online simulator and it does do something. It will hold ~DACK low while either ~IOR or ~IOW are low. I will implement it on my board.

                    Comment


                      #70
                      Originally posted by vwestlife View Post
                      Attached is a dump of the Seagate ST-05X XTA interface card BIOS.
                      Thanks! I actually have that exact one already off my ST05X board and have it here with disassembly: https://github.com/JayesonLS/8bit-id...IOS_2.4_Ghidra

                      It would be very helpful to get a WD BIOS. I plan to have a jumper option on the XTA interface card to select between the ST and WD BIOS.

                      Comment


                        #71
                        Does anyone have an ST05X card with the resistor(s) populated on the area I have highlighted below? It is not populated on my card and would like to know the resistor value. The HD activity LEDs are driven directly by the hard drive and the current capability is not documented. I'd like to keep things simple and just use Seagate's original value.

                        I know there is at least one person who would like to populate the resistor / LED header on their card also.

                        ST04X-LED-Resistor-Highlighted.png

                        Comment


                          #72
                          Originally posted by JayesonLS View Post
                          I plugged it into an online simulator and it does do something. It will hold ~DACK low while either ~IOR or ~IOW are low. I will implement it on my board.
                          Looking at ISA timing diagrams DACK is supposed to be low until the end of IOR or IOW already. Again I suspect this is a fix for some common(?) bus timing mal-implementation discovered after the drives were built assuming everybody did it right. It’s a shame you probably have no chance of finding out why it’s there without tracking down an elderly Seagate engineer.
                          My Retro-computing YouTube Channel (updates... eventually?): Paleozoic PCs Also: Blogspot

                          Comment


                            #73
                            Originally posted by JayesonLS View Post

                            Thanks! I actually have that exact one already off my ST05X board and have it here with disassembly: https://github.com/JayesonLS/8bit-id...IOS_2.4_Ghidra

                            It would be very helpful to get a WD BIOS. I plan to have a jumper option on the XTA interface card to select between the ST and WD BIOS.
                            Here is the WD BIOS from my CompuAdd 810 motherboard, which has XTA integrated.

                            Compuadd 810 WD XTA BIOS.zip

                            Comment


                              #74
                              Originally posted by Eudimorphodon View Post

                              Looking at ISA timing diagrams DACK is supposed to be low until the end of IOR or IOW already. Again I suspect this is a fix for some common(?) bus timing mal-implementation discovered after the drives were built assuming everybody did it right. It’s a shame you probably have no chance of finding out why it’s there without tracking down an elderly Seagate engineer.
                              Yeah, and the timing diagrams I am looking at (http://www.ee.nmt.edu/~rison/ee352_s...C104timing.pdf) show that DACK should be held for even longer than this circuit is doing. I am tempted to just remove it, but there must have been some reason Seagate decided to implement it. It is very annoyingly messing up my minimal 3 chip design

                              Comment


                                #75
                                Originally posted by jafir View Post

                                Here is the WD BIOS from my CompuAdd 810 motherboard, which has XTA integrated.

                                [ATTACH]n1224776[/ATTACH]
                                Thanks for this. I spent some time disassembling it with Ghidra and added it to the analysis project here: https://github.com/JayesonLS/8bit-ide-analysis

                                I learned some interesting things:

                                1. The BIOS determines the interface address based on the BIOS address. If the BIOS is at C800, the ports start at 320, otherwise they start at 322. I think to support two drives, it would require two copies of the BIOS. This would be the case if two WDXT-150's were installed. Both the BIOS address and the port address jumper on the WDXT-150 (W1 and W2) would need to be changed together.
                                2. The WDXT-150 has an IRQ 5/2 selection jumper. However, the BIOS reads the configuration from the drive. WD drives have jumper to make this selection. With Seagate drives, I think you would be stuck on IRQ 5. Quite strange.
                                3. XTA drives only have 2 drive size bits (4 possible sizes). The WD BIOS supports a second set of drive parameters for 8 possible configurations. Which set to use is queried from the drive - I think it might be the "physical/logical" jumper on the WD drives that changes this.
                                4. The drive parameter tables vary when compared to the ST05X bios. I think this is why the ST351 A/X has so many jumper configurations - so it can be fully compatible with Seagate and WD BIOS'es. Drive info below for future reference.

                                Drive configs.PNG

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