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8 bit IDE (XTA) Replacement Project

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    Originally posted by Chuck(G) View Post
    Sure, in many of the traditional (2 cable) PC ESDI controllers, the behavior mirrors ATA, right down to the IDENTIFY command--something not supported in ST506-type controllers. It's not hard to see where the notion of IDE came from--certainly not from the ST506-interface drives.
    Can't you connect an ST506-interface drive to an AT MFM controller card? To a PC, a 16 bit IDE drive looks like an AT MFM controller, with some additions added along the way. I was of the understanding that the IDENTIFY command did not come along until IDE drives were already in common use.

    The 8 bit IDE (XTA) drives look to the PC like an original XT Xebec controller. I'm not sure there are any differences other than the meaning of the drive size bits. Sadly, no BIOS I have looked at hints at there being any kind of command for retrieving drive parameters.

    Comment


      The XTA interface boards came in. I assembled one to test. It seems to work with both the ST05X and WD BIOSes. At least with my ST351 A/X. I tested my WD93024-X drive with the WD BIOS and it just hung on boot. That drive stopped working in my TL/2 also so I think it is probably bad. Darn!

      After ordering, I changed around some address lines so that it could at least be possible to program the flash ROM from the installed PC. Hence the bodge wires. I still need to do a bit more development to related to this.

      I also need to make some changes for the bracket. I got the mounting holes wrong for the Keystone bracket I intended to use. Turns out that I can't find any off-the-shelf bracket that will fit without increasing the board dimensions past the magic 100x100mm size. Once the boards go past that dimension, the cost jumps sharply. Most, I need to take the board a little closer to the back of the PC. The one bracket I found with longer mounting tabs is a bit too high at the top of the board. I think this is about where folks add an unnecessary COM port as the cost of an assembled surface mount COM port + DB9 bracket from China costs about the same as the larger board and Keystone bracket.


      IMG_20210927_194312470.jpg IMG_20210927_194324997.jpg

      Comment


        Who are you using to fab the boards? Not all of them do the 100x100 crap

        Comment


          Originally posted by maxtherabbit View Post
          Who are you using to fab the boards? Not all of them do the 100x100 crap
          jlcpcb usually. Their premium for exceeding 100x100 is relatively small.

          Who doesn't do the 100x100 thing?

          Comment


            Originally posted by JayesonLS View Post

            jlcpcb usually. Their premium for exceeding 100x100 is relatively small.

            Who doesn't do the 100x100 thing?
            Ahh I also use JLCPCB but now I understand what the disconnect is. JLC only does the 100x100 limit on designs which qualify for their promotional prototype. If you exceed that size it no longer qualifies for the promotional price. However I get all my ISA cards in ENIG which doesn't qualify for the promotion regardless, and I see you got HASL

            Comment


              Originally posted by JayesonLS View Post
              I also need to make some changes for the bracket. I got the mounting holes wrong for the Keystone bracket I intended to use. Turns out that I can't find any off-the-shelf bracket that will fit without increasing the board dimensions past the magic 100x100mm size.
              Or you could get creative, rotate your Gerber files by a few degrees and use a slightly unconventional board outline.
              Alternatively, just use the cheapest bracket you can find (without mounting tabs) and screw it to a pair of plastic blocks, which in turn you can screw to the board.

              Comment


                Originally posted by maxtherabbit View Post

                Ahh I also use JLCPCB but now I understand what the disconnect is. JLC only does the 100x100 limit on designs which qualify for their promotional prototype. If you exceed that size it no longer qualifies for the promotional price. However I get all my ISA cards in ENIG which doesn't qualify for the promotion regardless, and I see you got HASL
                I do use ENIG on final boards. There is still a premium for those in small quantities for exceeding the magic size - about 1.5x. They actually give you a couple of extra mm before the price jumps, but I think I need just a little more than that. I think the hole will close, but the wall will be so thin.

                Originally posted by Benedikt View Post

                Or you could get creative, rotate your Gerber files by a few degrees and use a slightly unconventional board outline.
                Alternatively, just use the cheapest bracket you can find (without mounting tabs) and screw it to a pair of plastic blocks, which in turn you can screw to the board.
                Rotating is an interesting idea. It would however need a substantial rotation to move the bottom hole back far enough. That would eat a lot of board real estate and turn a fairly easy to route board into a very challenging one. I suspect it would probably make assembly orders challenging too.

                I'll bite the bullet and make it work with an off the shelf bracket. Just a little frustrating to be a few mm short. Keystone actually have a bracket that would work great in a catalog sheet but it has been discontinued. We are lucky though that ISA brackets are still available at all.

                Comment


                  Attached is the ROM of the 1987 Zenith OEM Western Digital IDE-XT interface card I got on eBay. It is very early for any kind of IDE, but I was able to get it working with my WD93028-X drive. There is no formatting routine in ROM and it only works with Western Digital drives with sector translation enabled.

                  Attached Files

                  Comment


                    Originally posted by vwestlife View Post
                    Attached is the ROM of the 1987 Zenith OEM Western Digital IDE-XT interface card I got on eBay. It is very early for any kind of IDE, but I was able to get it working with my WD93028-X drive. There is no formatting routine in ROM and it only works with Western Digital drives with sector translation enabled.
                    Thanks! Great quality image of the front size of the board. Would it be possible to get a pic of the back side? I would like to check a couple of things about the circuit.

                    Comment


                      Originally posted by JayesonLS View Post
                      Thanks! Great quality image of the front size of the board. Would it be possible to get a pic of the back side? I would like to check a couple of things about the circuit.
                      The rear of the card, including bodge:


                      Comment


                        Originally posted by vwestlife View Post
                        The rear of the card, including bodge:
                        Thanks again! I was able to confirm that like the Seagate card, the drive data lines are directly connected to the bus. That is good, since I implemented my board that way. The use of the LS244 and resistor bank for many of the signals is a little strange - seems to be buffering non-data lines. I can't see why that would be necessary unless some drive or some system was not behaving as it should. I suppose it is possible that is why my WD drive is not working with my card design. I will have to try to find an original WD card.

                        I disassembled the BIOS some. It is very small - just a bit over 2K. Copyright is Zenith, not WD. The low level format entry point jumps straight to the int 13 handler code (BIOS disk access functions). So that is not going to format anything At least some portions of the BIOS is not originally for IDE drives. The drive numbering assumes there are two drives on every interface. That is possible with the MFM controllers but not with XT-IDE. Second drives are on a second interface with XT-IDE.

                        The drive parameter table is different again from the other cards I looked at. 3 of the 4 drives in the table are the same ~20MB settings and one is for 32MB. I don't actually see any code which chooses anything other than the first entry (20MB). Oh, hey look, I can post in a table from Google Sheets. Comparisons below:
                        Drive Type ST05X WD-default WD-alt Old Zenith BIOS
                        Cyl Heads Size (bytes) Cyl Heads Size (bytes) Cyl Heads Size (bytes) Cyl Heads Size (bytes)
                        0 3D4 5 42,649,600 264 4 21,307,392 267 4 21,411,840 264 4 21,307,392
                        1 267 6 32,117,760 267 6 32,117,760 30E 3 20,419,584 39D 4 32,204,800
                        2 3D4 5 42,649,600 3D1 5 42,519,040 30E 4 27,226,112 264 4 21,307,392
                        3 267 4 21,411,840 267 4 21,411,840 30E 2 13,613,056 264 4 21,307,392
                        ST351/AX when configured for ST05X per Tandy faxback instructions
                        ST325X

                        Comment


                          Originally posted by vwestlife View Post
                          The rear of the card, including bodge:
                          The bodge is interesting. Looks like they got the reset backwards. That inverter's whole job seems to have been to invert the reset signal. After the bodge, reset is no longer inverted. However, they also added that R/C circuit (there is a bodge cap on the front side). I can't quite make sense of what that does - maybe the machine it was installed it had something odd with the reset.

                          Comment


                            I have been stuck in a bit of a loop with moving forward with the drive development - never feeling sure I had the optimal way to attach a microcontroller to the bus. I think I have found it now.

                            The Raspberry Pi Pico has a rather brilliant feature they call Programmable IO. It involves a very cleverly designed programmable state machine (really, a simple processor) with very flexible connections to the PIO pins, as well as FIFOs + IRQ control to connect to the main processors. The timing is very explicit and executes once instruction per clock cycle (125MHz apparently). On a 10 MHz ISA bus, that would be 50 instructions per ISA IO read/write cycle. Crazy. Crazy good.

                            It looks like a very interesting and challenging optimisation problem to program the PIO hardware. I think I am starting to get my head around it though, and it looks to me like it is extremely well suited to ISA devices. The only thing it I see that it looks poorly suited to is decoding large addresses - say port 388 out of a 10 bit port range. For the 2 bits of addressing needed for XTA and IBM 8 bit DBA drives, it like there are multiple good ways to handle that. By adding some additional address decoding logic I think it would be possible to implement a very capable PnP sound card with the PICO. It even has 2MB of built in flash memory.

                            The Pico also has a good number of pins, is very inexpensive and is likely to be around for a while. It has DMA to the PIO as well as the SPI (SD card). All the sample code I've seen indicates a clean and intuitive API. C/C++ support and Python for those who prefer that. The datasheet might be the best written I have ever read too.

                            I an pretty darn excited about the prospects.

                            The only down side is that the Pico is not 5v tolerant. That is going to drive me nuts as this drive replacement would otherwise have just been a Pico strapped to the bus and no other active components. It will be especially frustrating if singles of tri-state or open collector outputs are needed.

                            For anyone interested, I thought this was a good overview: https://hackspace.raspberrypi.org/ar...pberry-pi-pico

                            Then this video: https://www.youtube.com/watch?v=yYnQYF_Xa8g

                            And then the PIO section of the RP2040 datasheet: https://datasheets.raspberrypi.org/r...-datasheet.pdf

                            Comment


                              Two remarks:
                              - A 10 MHz ISA bus doe not mean the I/O is running at 10 MHz as well. The Turbo-XT boards I have insert at least one wait state when doing I/O. That enables them still to use the 5 MHz 8237 DMA IC and othe 5 MHz ICs. And if you are not sure about the speed, nothing stops you to use the IOCHRDY line to insert wait state by yourself.
                              - I'm not at home right now so I cannot check but what MPUs were the original drives using? Certainly not something that was equivalent to a Pi Pico. I think a Arduino would be more in line. And it would save your 5V problem.

                              Looking forward to your solution,
                              With kind regards / met vriendelijke groet, Ruud Baltissen

                              www.baltissen.org

                              Comment


                                Originally posted by Ruud View Post
                                Two remarks:
                                - A 10 MHz ISA bus doe not mean the I/O is running at 10 MHz as well. The Turbo-XT boards I have insert at least one wait state when doing I/O. That enables them still to use the 5 MHz 8237 DMA IC and othe 5 MHz ICs. And if you are not sure about the speed, nothing stops you to use the IOCHRDY line to insert wait state by yourself.
                                - I'm not at home right now so I cannot check but what MPUs were the original drives using? Certainly not something that was equivalent to a Pi Pico. I think a Arduino would be more in line. And it would save your 5V problem.

                                Looking forward to your solution,
                                The original drives had additional hardware to support the micro. Seagate and WD both had custom chips that included the significant amount of glue logic needed. I am trying to minimize that extra logic as it adds to the problems of complexity/cost/dev effort/parts availability.

                                While the IBM drives can use IOCHRDY, the XTA drives to not have access to that signal. That would definitely change the conversation. I would use an AVR + GAL22V10 as the base.

                                There is some discussion on choice of micro earlier in this thread. The AVR's used in the original Arduino - I like them - but they are not nearly fast enough to listen to the ISA bus on their own. There is actually a SID replacement project I found that does do this for the C64 by rather massively overclocking the AVR. By my reading, it would need to be at least twice as fast again for the ISA bus. It looks like some ARM micros might be just about fast enough but the CPU timings gets less deterministic with higher performance. Most dump you into 3.3v land anyway.

                                There is one 5v all in one option - a Cypress micro part with a CPLD-like programmable logic section. The downsides are that it is a bit of an oddball part/toolchain, it is kind of pricey, and there is no practical option for easy hand soldering. I want to design something that is easy for someone to produce in small numbers.

                                I was originally going to go with AVR + CPLD, but the CPLD doesn't meet the high level drive current requirements for the ISA bus. I mean, I am pretty sure it would actually work in the target PC's which won't have 8 expansion cards in them. Seems prudent to stay in spec though. So it would still needs at least two additional 74 ICs and possibly one more.

                                The PIC32 looks promising - it has 4 built in 8 bit registers which greatly simplifies the needed glue logic. There are only a few 5v tolerant pins but that could be enough to save a level shifting chip. I think a pair of 74LVC245's would do the trick. The documentation/tool chain does not look amazing. Not sure it is a very future proof part to be basing things on. I was going to start working with it anyway until I discovered what the Pico can do.

                                The Pico, with its super-duper programmable IO, looks to be more than capable enough and also the easiest to experiment with. More fun too I think I will be able to easily prototype the whole solution on a breadboard. It will also need at least two 74LVC's to do the level shifting, and possibly one more. I have one already - hopefully I will get a chance to experiment with it soon.

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