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Speed of Intel PC/MCS-80/86 chips

mR_Slug

mR_Slug

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Please can anyone confirm if I'm reading these datasheets correctly:

8259A "Data Valid From RD/INTA": Max 200ns so the max speed is 5.0Mhz?
8259A-2 "Data Valid From RD/INTA": Max 120ns so the max speed is 8.3Mhz? (not shown)
8259A-8 "Data Valid From RD/INTA": Max 300ns so the max speed is 3.3Mhz?

On page 473 of the data catalog:
Image1.jpg

8255A "Data Valid From READ": Max 250ns so the max speed is 4Mhz?
8255A-5 "Data Valid From READ": Max 200ns so the max speed is 5Mhz?

On page 590 of the data catalog:
Image2.jpg
Source:
ftp://bitsavers.informatik.uni-stut...taBooks/1979_Intel_Component_Data_Catalog.pdf
 
What do you mean by "speed"? In other words, what are you trying to do?

You can use a plain-Jane 8255 on a very fast system if you design for it (i.e. meet minimum pulse width requirements) and don't demand that it transfer data than it's capable of doing. Heck, I've got a PCI card with 3 8255-2s on it. Works just fine.

You can do this because the 8255 is a peripheral interface. Same goes for the 8251 and other similar chips. On the other hand, something like an 8257/8237 is tied closely to the system timing and needs its specs to match that of the host.
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If you're looking for a faster 8255, consider the Intel 82C55A. The 8255A is an ancient chip, dating back to the 8080, and implemented in NMOS. The 82C55A is a later CMOS version.
 
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Also keep in mind that with Intel, an -A suffix may also imply slightly different operation.

For example the 8251 is very different from the 8251A in several respects.
 
The A suffix seems to often be the result of updating a chip to work with the latest new Intel CPU, but other times I really can't work out what it is supposed to mean. So I've listed the non-A and A separately.

I've tried to avoid getting into the UARTs etc, but it's good to know anyway. So am I completely barking up the wrong tree with working out the max speed of say the DMA controller? In a PC/XT it runs at 4.77MHz anyway or 4MHz in an AT IIRC.
 
In the case of the 8251/8251A, it's because the original was an unmitigated disaster. Hangs, no buffering, etc.

Some of the older datasheets will detail the differences.
 
Intel 80xx speed suffixes are bizarre... If I recall correctly 8087 FPU had at least 5 different suffixes: 8087 (no suffix), 8087-3, 8087-2, 8087-6, 8087-1.

Random notes:

An PC/XT automagically inserts one wait cycle for I/O operations. Turbo XTs and ATs insert more wait cycles, so that the delay between /IOR or /IOW to data valid/data sampled is similar to the original PC with 4.77 MHz CPU clock. So just "data valid from" doesn't really correlate with CPU frequency.

DMA clock: well implemented Turbo XTs switched system clock to 4.77 MHz during DMA operations, the original AT divided the CPU clock by 2 to get the DMA clock (so either 3 MHz or 4 MHz depending on the CPU frequency). Many newer AT compatibles simply run DMA at 4.77MHz.

The 8251/8251A in addition to the UART Transmit/Receive clocks also needs a fast clock... only god knows why :)
Normally that fast clock is connected to the CPU clock, but generally can be connected to any other clock that is at least 30 times faster than the transmit/receive clocks. So, if the CPU clock is way too fast, it is possible to provide some other clock, for example divide the CPU clock before feeding it to the USART.
 
Both the 8255 and the 8251 are ancient x80 support chips. I think that IBM used the 8251A on their bisync adapter for the PC.

But there are much better choices, if you're designing. My favorite for a USART with BRG wasn't the 8250, but rather the Signetics 2651. 28 pins and easy to interface, even if no one ever uses the 2650 MPU. Motorola licensed the design for their 68661 PCI chip. I've even used one of these as part of a floppy controller.
 
sergey said:
The 8251/8251A in addition to the UART Transmit/Receive clocks also needs a fast clock... only god knows why :)
Normally that fast clock is connected to the CPU clock, but generally can be connected to any other clock that is at least 30 times faster than the transmit/receive clocks. So, if the CPU clock is way too fast, it is possible to provide some other clock, for example divide the CPU clock before feeding it to the USART.
Click to expand...

If you are doing synchronous, with a USART, the clock can be the same as the data rate. If you are doing asynchronous, with a USART or UART, it uses a digital sampling to frame the data bits. Allowing for some distortion, this is, usually, 16 times the data rate. It doesn't require intervention by God.
Dwight
 
sergey said:
An PC/XT automagically inserts one wait cycle for I/O operations. Turbo XTs and ATs insert more wait cycles, so that the delay between /IOR or /IOW to data valid/data sampled is similar to the original PC with 4.77 MHz CPU clock. So just "data valid from" doesn't really correlate with CPU frequency.
Click to expand...

I was really thinking in terms of the chip its self in isolation, rather than a correlation with CPU speed IN an PC/XT/AT.

I think I will just list the table data, since it is probably more useful. Perhaps a better title of this thread would have been "What is a meaningful differentiation between the following chip specifications."

Specifics about chips at this level are usually only relevant to someone designing a system, where you would want the full datasheets anyway. My page is really just to give an overview of chipsets. Here I've had to go into way more detail than a i wanted to just to work out what -2 and -8 means:)

On a side note I noticed the C&T 82C206 supports "8MHz DMA". Was this functionality exploited much in software? It was a very common chip. Intel was building motherboards in 1989 with 4MHz DMA so they didn't think it was important.
 
Sometimes even manufacturers can screw up specs.

I recall one of the engineers who was tasked to employ the then-new Intel 8202 dynamic RAM controller in a design. He pulled me aside and said "look here, if I use their worst-case timings, my DRAM has to have a negative access time." He was right too. We used it anyway.
 
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