Anonymous Coward
Veteran Member
I seem to recall somebody had figured out a way to modify standard 256kb SIMMs to work in the 5162. Does anyone remember the link to the post that describes how to do it?
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5162 XT/286 SIMMs
- Thread starter Anonymous Coward
- Start date
maxtherabbit
Veteran Member
To the best of my understanding, there is no mod, they just work. I believe you need to use 9 chip SIMMs to meet refresh timing requirements.
Agent Orange
Veteran Member
modem7
10k Member
The ninth chip is for parity.
Maybe you meant something like, "Make sure you use 9 chip SIMM's, and ones that meet timing requirements."
modem7
10k Member
Does anyone know for fact whether or not 'standard' 256KB SIMM's will work, rather than 'best of recall'? Surely, a 5162 owner has either been forced to try it, or experimented. I known that member 'Dani G' would also like to know of any certainty (thread 73757).
FWIW here's the data sheet for the simm's in mine, I'm not sure what other simm's i have stashed away but i'll have a look tomorrow.
maxtherabbit
Veteran Member
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maxtherabbit
Veteran Member
I have a 5162 motherboard en route as we speak, I should have a definitive answer for y'all by the weekend
Anonymous Coward
Veteran Member
Will do, thanks.
I actually haven't tried standard 256k SIMMs yet, but I have some so I will give it a shot. Given IBM's history of using non-standard 30 and 72-pin SIMMs I'm not confident it will work. My guess is that the modules need the PS/2 pinout conversion:
https://www.vogons.org/viewtopic.php?t=59166
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Might do, I just finished testing a pair of 3 chip simm's in my 5162, P/N SJ-2563N, 70ns chips, Counted up to 640k and ran Checkit 3 memory test in thorough mode twice and passed with no problems. My 5162 is running the AMI bios. Maybe the IBM bios would choke on it ??.
maxtherabbit
Veteran Member
You really need to run a more thorough memory diagnostic vs the POST to detect those refresh timing errors. Even the check it memory test doesn't catch them. I've found the best way is to use a ramdrive and copy files back and forth, but that probably won't work here since this is conventional memory
I actually installed DOS 6.22 and Checkit 3 on a spare clean CF with those simm's in the 5162, It went fine but i'm not testing anymore i was getting a bit concerned about damaging the Simm sockets, Rather a tight fit and didn't want to break the retainers. The original Simms have probably been in there since new.
ibmapc
Veteran Member
maxtherabbit
Veteran Member
I don't know for sure if the 3-chip refresh problem is a thing or not with 256kB SIMMs. I can say with certainty that I've had several 286 and early 386 systems (using VLSI brand chipsets) that would POST and boot just fine using known-good 1MB 3-chip parity SIMMs, but if you made a ramdrive and then flogged it you would get parity check in short order. Switching to 9-chip 1MB SIMMs fixed it. The 9-chip SIMMs were actually 80ns vs the 70ns of the 3-chip units, so it was not an access time problem
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maxtherabbit
Veteran Member
I can confirm that these bog standard 9 chip 256kB SIMMs work in the 5162. I forgot to bring a floppy controller in to the shop with me today so I can only run BASIC, but it seems to work fine
I have not been able to fault the 9 chip 256k pair of simms i tested or the 3 chip 256k pair of simms, I ran checkit 3 and Micro scope memory test with 100% pass, Today i removed the AMI Bios Roms and Re-fitted the original IBM Bios ROMs and with the 3 chip simms in i ran the memory tests with no problems, I installed the XUB r602 and it's also running fine, I have not been able to fault it yet but will play more over the next few days.
maxtherabbit
Veteran Member
That's very promising. I would love to be wrong about the 3-chips
modem7
10k Member
The '3-chip parity SIMMs' issue that maxtherabbit wrote of is discussed at [here], where the subject is 1MB SIMM's in certain IBM machines.
For example:
* 30-pin 9-chip 1MB SIMM that uses HYB5110008J chips: The HYB5110008J chip requires 512 refresh cycles
* 30-pin 3-chip 1MB SIMM that uses HY514400J chips: The HY514400J chip requires 1024 refresh cycles
So, if the particular 3-chip SIMM above is placed into a system where the refresh only goes as high as 512 rows, then half of each HY514400J chip in the SIMM will not get refreshed.
A similar situation, for example, happens with the 4164 chip, and is discussed in the 'Refresh Cycles' section at [here].
IBM 5162
---------
The 5162 uses 256KB SIMM's, but the same potential problem exists.
IBM's technical reference for the 5162 indicates that the motherboard's refresh is 256 rows (cycles) every 4 ms (3.84 ms actually).
If I look at the cycle (row) count portion of the refresh requirement of the 3-chip SIMM used by Malc at post #10, I see:
MCM514256AJ chip = 512 cycles (rows)
MB81256 chip = 256 cycles (rows)
So, I am expecting that that SIMM, fitted to a 5162, is only having half of the MCM514256AJ chips refreshed.
Any RAM checker that reads back data just written, is not expected to show a non-refreshed bit as faulty.
The Supersoft/Landmark diagnostic includes a 'Memory Refresh Test', where it waits 10 seconds before reading back the data written, however, according to the diagnostics's manual, the scope of that test is only the first 16KB of RAM.
I expect that using DEBUG/BASIC to write-delay-read test bytes in the affected area of RAM, would detect the problem.
For example:
* 30-pin 9-chip 1MB SIMM that uses HYB5110008J chips: The HYB5110008J chip requires 512 refresh cycles
* 30-pin 3-chip 1MB SIMM that uses HY514400J chips: The HY514400J chip requires 1024 refresh cycles
So, if the particular 3-chip SIMM above is placed into a system where the refresh only goes as high as 512 rows, then half of each HY514400J chip in the SIMM will not get refreshed.
A similar situation, for example, happens with the 4164 chip, and is discussed in the 'Refresh Cycles' section at [here].
IBM 5162
---------
The 5162 uses 256KB SIMM's, but the same potential problem exists.
IBM's technical reference for the 5162 indicates that the motherboard's refresh is 256 rows (cycles) every 4 ms (3.84 ms actually).
If I look at the cycle (row) count portion of the refresh requirement of the 3-chip SIMM used by Malc at post #10, I see:
MCM514256AJ chip = 512 cycles (rows)
MB81256 chip = 256 cycles (rows)
So, I am expecting that that SIMM, fitted to a 5162, is only having half of the MCM514256AJ chips refreshed.
Any RAM checker that reads back data just written, is not expected to show a non-refreshed bit as faulty.
The Supersoft/Landmark diagnostic includes a 'Memory Refresh Test', where it waits 10 seconds before reading back the data written, however, according to the diagnostics's manual, the scope of that test is only the first 16KB of RAM.
I expect that using DEBUG/BASIC to write-delay-read test bytes in the affected area of RAM, would detect the problem.
maxtherabbit
Veteran Member
So I think to resolve the original question of the thread we can safely say that any standard 9 chip 256kB SIMMs will do