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Best way to implement a 16-bit bidirectional IO port on the AT bus?

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    #31
    Originally posted by maxtherabbit View Post
    The Pi interface could assert MASTER# and simply write directly to the VGA page

    Of course you also need to do the DRQ and such
    Whether that's going to work will probably also depend on what mode the VGA card is in. Doing DMA straight to it is going to be fun if you're running in a Planar mode or otherwise have to flip pages. (64k does sound suspiciously like this could be mode 13h, which is relatively straightforward "chunky" with no page-flipping.)

    Doing DMA straight to RAM to allow it to be processed by the CPU is still an option, but with DMA you do open that big pandora's box of arbitration, making sure you don't steal the ball for so long memory refresh goes *poop*, etc. My gut feeling would be you'd still probably want to have whatever you're DMA-ing in an external buffer that can respond at wire speed, because I'm not sure GPIO bit-banging can.
    Last edited by Eudimorphodon; May 3, 2020, 04:08 PM.
    My Retro-computing YouTube Channel (updates... eventually?): Paleozoic PCs Also: Blogspot

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      #32
      I like the bus mastering idea, if the raspi can pull it off.

      Transferring data on a 286 from I/O port to memory with REP INSW doesn't seem to get much faster than 1 - 1.5MB/s or so.

      On the other hand, if the goal is to display some external video, maybe it's time to use that VGA feature connector somehow?

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        #33
        DMA would be cool, no doubt about that. I just have this feeling that you'd need some kind of state machine to pull it off, but maybe I'm too pessimistic about the RPI's real-time abilities.
        My Retro-computing YouTube Channel (updates... eventually?): Paleozoic PCs Also: Blogspot

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          #34
          Originally posted by maxtherabbit View Post
          The Pi interface could assert MASTER# and simply write directly to the VGA page

          Of course you also need to do the DRQ and such
          I doubt I can sync it with the vertical refresh that way. Would get tearing and such. It would also have to do it all fast enough to be able to relinquish the bus before the next dram refresh was required. I don't trust myself to get the bus timing right for DMA. Also might be getting a little too complicated for my stupid lil' brain to wrap all around, hahaha.

          If we really wanted to do DMA, I think we'd probably want something designed for externally clocked RT operation to broker data between the ISA bus and the Pi anyway. Getting into Arduino territory, I think. I just don't think the Pi is designed for that kind of operation. I mean sure you can assign interrupts to the gpio pins, but it just doesn't have the kind of clock sync capabilities that would be needed to do it robustly, I think.

          I mean, I am not trying to cast aspersions on your idea or anything. But I don't think I'm personally capable of implementing it properly. ;P
          -- Lee

          If you get super-bored, try muh crappy Odysee channel: Old Computer Fun!

          Looking For: QBus SCSI Controller, Type 4 HDC for Tandy II/12/16/6000, Mac IIci drive sled, PC-era Tandy stuff, Old Unix Stuff, Serial Terminals (HP and DG in particular)

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