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8086 based IBM compatible PC schematics

lazy

New Member
Joined
May 3, 2020
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Ukraine
Greetings!

I am looking for schematics of IBM PC compatible computers based on 8086, preferably PS/2 model 25 or model 30.
What I am interested in exactly - is the part which is responsible for 16-bit word bus operations with 8-bit memory/IO, where bytes are shifted from higher to lower part of the bus, depending on even/odd addresses.
I have checked the schematics for PC AT, and it gives some general idea, but still it's 286, not 8086, so I think there may be some differences.
Also, I found the schematics for old soviet XT clone Poisk-2 with КР1810ВМ86М on board, but these are not really of good quality, and have no clear description, so I hardly understand what is going on there.
Apparently, IBM has high quality documentation for their XTs and ATs, and I'd like to check out 8086 PS/2 models schematic as well, but it seems google knows nothing about it.

Any help is much appreciated.

Thank you!
 
You may find another Soviet 8086 clones interesting. Discussed at the end of this topic
http://www.vcfed.org/forum/showthre...-still-100-compatible-with-the-original-PC-XT

This "POISK-2" (don't know how to translate... may be "Pathfinder-2" haha ) is a turbo 8086 full ISA-compatible machine with onboard
clock and EMS and has a full schematic, PCB gerbers, BIOS images e.t.c. available
https://bitbucket.org/Haper/poisk-2-mainboard/src

You may read an article at russian geek site habr.com via Google Translator
https://habr.com/ru/post/407265/

There was a person at ebay who sell PCBs.


Other Soviet 8086 machines were not ISA-compatible and have a MULTIBUS1-alaike system bus.
ES1840
http://emuverse.ru/wiki/EC-184x
ISKRA-1030
http://emuverse.ru/wiki/Искра-1030
 
If they exist, I'd love to get my hands on schematics for the Eagle 1600, an 8086 based somewhat IBM PC compatible clone. But my suspicion is it's missing exactly the circuity being discussed, as it seems to fail doing 16-bit read/writes to the 8-bit ISA bus. Hence, part of the reason it is only somewhat IBM PC compatible.
 
I remember a recent thread about the Amstrad PC1512 in which its schematics came up, but double checking it appears, alas, that the part the OP would be interested in is inside of a gate array chip.
 
A few of Tandy 1000 models have 8086 CPU. (Tandy 1000 RL)
It is not 100% compatible with IBM PC.
 
Wow, thank you all for your replies!
Now I have some good stuff to read :D
From the first look it seems that 8086 PC clones use additional 74ALS245 to move a byte between hi an low portions of the bus, as well as another 74ALS245 paired with 74ALS373 on low 8 bits to latch even addressed bytes, while waiting for odd byte to be transferred to higher 8 bits. But on 286 PC AT, they used 74ALS646, replacing 74ALS245 / 74ALS373 pair with one single chip. Is there any significant difference between these two approaches?
I'll also need to figure out where CE and DIR signals to control those transceivers / latches are coming from, but that's another part of the story.
 
I'll also need to figure out where CE and DIR signals to control those transceivers / latches are coming from, but that's another part of the story.

Those control signals need to be generated by the motherboard - that’s probably the number one reason why 8086 motherboards are more complex than 8088 ones. A good high-level description of what needs to happen is in Chapter 8 of “ISA System Architecture” (third edition) by T. Shanley and D. Anderson - you can find a cheap used copy on Amazon.
 
Doesn't the M24 also use a few PALs on its motherboard?

Yes, but for the bus steering logic they used an 82S123, a 32 x 8 bipolar PROM. The schematic is at page 275 and the PROM contents & description of its operation are at page 113 of the Theory of Operation manual. I would have suggested to look at this as an example but it’s well know that the implementation is “wrong”, ie the way the M24 splits 16bit transfers into two 8-bit cycles is not compatible with IBM’s. As you would know as you helped design a replacement for the bus correction kit in this very forum :)
 
FYI, I found this thread using google, then tried to find it here using search, but for some reason failed. Possibly the search range is time limited?

I was looking through my box of recovered Intel chips and found a 8086. I also have various others such as i8253. I got to wondering whether it would be possible to build a IBM PC-XT like computer, not a full clone, but one which can run DOS software. So I started looking around for schematics, but was surprised to find nothing relevant. One thing is I remember that there was a 8086 (8088?) design published in Byte magazine, possibly by Steve Garcia. I couldn't find this article either. Obviously I would fail my internet search 101 examination if ever I took it.

I did find a PCB for a full PC-XT clone from MTM Scientific. By using SRAM a lot of complexity of the use of DRAMs could be eliminated. There is some clone design like this, but it uses a large chip to replace the various chipset ICs, rather than a collection of TTL ICs.

I think that to simplify the circuit I could eliminate the DMA. As far as I can tell, in the original PC it is used for DRAM refresh, but would not be required in a sort-of-clone which uses SRAM.

Ironically it has made me recall just how many old ISA motherboards and ISA cards I have thrown away in the past (back in the 90's). On Ebay the prices for all ISA motherboards and cards is astronomical.

Any pointers or idea for simplification, would be appreciated.
 
It might be worth pointing out that the 8086 ps/2's alternately store high and low bytes of a word between seperate banks of ram. That's about how I remember it. Don't know if that's typical or not (doesn't sound like it should be).

Source: https://www.ebay.com/itm/Structured...716782&hash=item217d48c974:g:oXYAAOSwWgxZcVoS

and yes I get a very wholesome cut off that sale. IT"S NOT MINE.

The OP could also look at 80186 based computers like the Tandy 2000. It's tech ref is readily available.
 
The schematic of the IBM 5170 is very helpful as well. The 80286 must be able to handle 8-bit cards and therefore the system needs a 16-to-8/8-to-16 bit converter as well. Don't worry about the used PALs.
 
Thank you for the various pointers. Last night I opened KiCad and started to design my 8086 CPU card. I will try and make it as "IBM PC" compatible as possible, but as I mentioned I will leave out the DMA chip, since it isn't really needed. I have no idea on the original PC if the floppy used DMA, even so, the CPU has more than enough speed to read each byte of the sector from the FDC, one by one.

I also found "Sergey's XT" site. I had already seen a number of YouTube videos where people had soldered together modern ISA card kits (OMG how I am kicking myself for throwing away so many ISA cards - I don't even have a single serial ISA card remaining).

Just FYI, for the past year I have been playing with two different 16 bit CPUs: the Motorola MC68000; and the Nat Semi NS32016. I have developed a set of single-in-line CPU PCBs and memory PCBs which allows me to put a system together quite easily. I have a backplane, but it more for ease of wiring the main address and data lines, than an effort to re-invent a new bus. So designing the 8086 16 bit CPU board won't be too difficult. I use an Arduino to tristate the CPU, allowing it to write to RAM (read too), to load the OS. The only issue is that the OS is not write protected in case of code crashes, but the OS can be re-loaded in a fraction of a second, so is not a real problem. I have ported EMUTOS to the MC68000, and can boot to the desktop, but I had to use a real Atari keyboard and mouse. I implemented video in a FPGA (Altera), and I will implement PC video modes, starting with MDA, in the FPGA too. I am not bothered about 100% compatibility, so I won't be implementing a 6845 core, but the video memory behaviour will be implemented and the FPGA will generate a MDA screen onto standard VGA.

A couple of issues. The 8086 has MIN and MAX modes. In MIN mode the 8288 chip, isn't required, a nice saving (money and PCB real estate). I can't see any advantage to MAX mode, unless you know better :). I'm also uncertain as to the impact of the 16 bit bus mode on I/O addressing. On this CPU do the IN and OUT I/O instructions work on 16 bit quantities or only 8 bit? Are there any problems with the addressing of say the 8253 PIT, which uses contiguous addresses. On my current CPU cards, where I/O chips have been used they only connect to the lower 8 data bits and their addresses then are accessed every 2 locations. I need to delve into the 8086 databook to better understand I/O addressing. If I have to wire up these I/O chips so that they are accessed on slightly different addresses to the vanilla PC, then I assume that this can be hidden in the BIOS?

I note that the 8086 needs a weird 66/33% input clock. Again I can't be bothered to use (or buy!) the normal Intel part, so this can be implemented using a GAL.

I'll post updates from time to time, but I don't expect to get a PCB back until April timeframe.
 
I'm also uncertain as to the impact of the 16 bit bus mode on I/O addressing. On this CPU do the IN and OUT I/O instructions work on 16 bit quantities or only 8 bit? Are there any problems with the addressing of say the 8253 PIT, which uses contiguous addresses. On my current CPU cards, where I/O chips have been used they only connect to the lower 8 data bits and their addresses then are accessed every 2 locations.

This is off the top of my head, but I'm reasonably certain that with the 808x all addresses are byte-sized, which means that:

* 16-bit transactions can only happen against "even" addresses, and the CPU doesn't exactly have automatic bus sizing built-in. (It has a status line that indicates if it's doing an 8 or 16 bit transfer but it's an output.)
* Therefore if you're hitting an "odd" address with an 8-bit write that data's coming on D8-D15 instead of D0-D7. The solution to this that's in the 8086's datasheet seems to be that you should only interface 8-bit peripheral chips so they only do data transfers at every-other-address, but IBM ignored this when they built the PC (which of course has only an 8-bit bus, so this isn't a problem)...
* Therefore you need some gross multiplexing and latching goo to redirect 8-bit transactions at odd addresses or 16 bit word writes to 8-bit peripherals and memory into either one or two transactions on only D0-D7.

The IBM PC-AT datasheet has schematics for how this was done, it's scattered over multiple pages but sheet 13 shows the buffers that crossover SD0-7 and SD8-15 and sheet 14 has the data latches for the word-size-transaction case.

Again, take this with a grain of salt but I think this is approximately correct. So the long and short of it would be if you want to be anywhere close to PC hardware compatible you'll need a bus converter circuit.
 
Thank you for the various pointers. Last night I opened KiCad and started to design my 8086 CPU card. I will try and make it as "IBM PC" compatible as possible, but as I mentioned I will leave out the DMA chip, since it isn't really needed. I have no idea on the original PC if the floppy used DMA, even so, the CPU has more than enough speed to read each byte of the sector from the FDC, one by one.

You'll probably need to bake your own BIOS if you leave out DMA.

Bad suggestion: I think there's a disassembly of the original Tandy 1000 BIOS out there, those machines have a conditional in their initialization to check if DMA is present and fail over to a DMA-less floppy driver if it's not there. Maybe that would be helpful if it comes to hacking a BIOS.
 
Bad suggestion: I think there's a disassembly of the original Tandy 1000 BIOS out there, those machines have a conditional in their initialization to check if DMA is present and fail over to a DMA-less floppy driver if it's not there. Maybe that would be helpful if it comes to hacking a BIOS.

Ha, ha! No very good suggestion!

I do already have the listing, but it doesn't quite match the Tandy 1000 BIOS ROM binary.

I finally got my 8088 PCB fabricated by JLCPCB. I soldered in all the sockets, worked out the equations for the two GALs, fought against WinCUPL (which was indicating lots of errors) until it finally compiled, blew the GALs, then tried out the board in my backplane. Next problem was non working single-step GAL, which appeared to be down to clock overshoot (only 4.77MHz) from the OKI 82C84. I "solved" this be replacing with an Intel 8284 part. I obviously need to review my PCB design!

Based on some earlier work, I loaded the Tandy 1000 ROM into RAM and was able to run/trace in single step mode, seeing memory and IO writes written to the logging window (from the Arduino bus sniffer, used as a simple logic analyser). I grepped the CGA memory writes and saw text indicating a failing memory count/check.

Next job is to program the supporting FPGA board for CGA video. I'm sure that there is some VHDL/Verilog code which I can re-use.

I have two 8086's in my junk box, so this topic of using a 8086 while maintaining ISA compatibility still interests me for a future project. I'll review the links given above. So sorry if my postings have been a little off-topic.
 
You'll probably need to bake your own BIOS if you leave out DMA.

It depends on how you handle mass storage.

If you're on SRAM, you can probably get away with an off-the-shelf BIOS. It will try to set up the DMA controller for refresh, but that's just shouting orders into the void. :)

If you want to bypass a floppy drive entirely, there are other options for DMA-free systems. Not sure off hand what the XT-IDE and friends' BIOS does, but it's definitely possible to rig up something with the CH376S "USB flash drive to 8-bit bus" module that works on pure polling.
 
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