Fancy testing the latest XT/IDE board?
Work on a CPLD based (programmable logic) version of the ubiquitous XT/IDE has been quite active for the past six months, resulting in a finished board being built (for those interested, some 24 pages of development posts here).
As far as I know, only two of these boards have been assembled so far. Initial test results have been promissing, and I want to use the design as the basis for a follow up I'm working on, which basically adds a compact-flash header to the board and a couple of other minor refinements.
So, to get a grip on compatibility and stability, I'm offering anyone interested the opportunity to test my board. What you will need is:
I'd initially thought of keeping this to UK and Europe, for expedience, but it turns out it's only a few days to get it to the USA, so USA is included too. Onwards post should be inexpensive since it's just a small ISA card and an IDE cable. It might be best to leave the cable connected to the header throughout, to minimise the risk of the board being damaged (the header I've used is a very tight fit).
If you can help with this project, please send me PM and/or post here. Many thanks!
Notes
Other developments of the original XT/IDE are also ongoing. There's a 'V2' from the creators of the original, which adds a snazzy serial UART to enable booting from disk images stored on another (presumably, newer) machine. There's also another CPLD based board, mainly for the PC/Jnr, which has some very nice feastures too (such as a ROM disk).
The 'Dangerous Prototypes V2' (DPv2) board being tested here offers no such enhanced functionality; rather it's a CPLD port of the original. The CPLD design means that new circuit designs, such as Chuck's line-swapping to enable faster reads, or a complete redesign to support memory-mapped IO (which should be faster still) could be just uploaded into the CPLD.
One advantage though of the DPv2 is that because it's quite small and uses mostly surface-mount components, it might be possible to get a batch of fully finished, programmed and tested boards at reasonable price. Minimum quantities are quite likely to be a problem for that though.
For those interested in the detail, the DPv2 board differs from the original XT/IDE not only because of the CPLD, but also it's 3.3V based (there's a voltage regulator on it). 3.3V logic levels have been designed to work with 5V TTL components and offer some advantages besides power consumption, but here the reason for this choice is that 5V CPLD components are becomming hard or at least more expensive to get, and some manufactures will be discontinuing 5V parts within the next year or so. But this raises the question of compatibility with older drives and system boards, which is precisely why I want to circulate this assembled and working board to assess quite how compatible it is.
Time is something of the essence here; the board has been a long time coming and I want to press on with the next development sooner rather than later. 20 testers taking 2 weeks each would be another year gone so I don't know how successful this will be, but I think it is at least worth a go. Especially if you have a big pile of drives and several systems, I'd really appreicate your input!
Finally, a small number of boards are still available if anyone would like to make up their own board. These are not kits however (just a bare board) and being fine-pitched SMT you'll need some equipment such as temperature-controlled soldering iron, flux, wick and isopropynol. The boards are however available free (or near enough free anyway).
Work on a CPLD based (programmable logic) version of the ubiquitous XT/IDE has been quite active for the past six months, resulting in a finished board being built (for those interested, some 24 pages of development posts here).
As far as I know, only two of these boards have been assembled so far. Initial test results have been promissing, and I want to use the design as the basis for a follow up I'm working on, which basically adds a compact-flash header to the board and a couple of other minor refinements.
So, to get a grip on compatibility and stability, I'm offering anyone interested the opportunity to test my board. What you will need is:
- A known-good PC with 8-bit ISA slots. Doesn't need to be an IBM PC or XT; any clone or industrial machine will do. But must be have only 8-bit ISA slots and be capable of acomodating an XT/IDE board with the BIOS at it's default location (D000h, IO 300h). Please check the 5V line is good (+/- 0.25V) with a multimeter before you start!
- At least one known-good IDE hard disk (preferably I want to focus on disks pre-dating ATA6, i.e. those made before year 2001, but testing in a variety of platforms other than the IBM PC and XT is just as important);
- Time to test the board on receipt (I'm keen to colate test results as quickly as we can) and post the results here;
- Comittment to post the card on to the next person as soon as you're done; and
- To promise not to look too closely at my decidedly dodgy soldering
I'd initially thought of keeping this to UK and Europe, for expedience, but it turns out it's only a few days to get it to the USA, so USA is included too. Onwards post should be inexpensive since it's just a small ISA card and an IDE cable. It might be best to leave the cable connected to the header throughout, to minimise the risk of the board being damaged (the header I've used is a very tight fit).
If you can help with this project, please send me PM and/or post here. Many thanks!
Notes
Other developments of the original XT/IDE are also ongoing. There's a 'V2' from the creators of the original, which adds a snazzy serial UART to enable booting from disk images stored on another (presumably, newer) machine. There's also another CPLD based board, mainly for the PC/Jnr, which has some very nice feastures too (such as a ROM disk).
The 'Dangerous Prototypes V2' (DPv2) board being tested here offers no such enhanced functionality; rather it's a CPLD port of the original. The CPLD design means that new circuit designs, such as Chuck's line-swapping to enable faster reads, or a complete redesign to support memory-mapped IO (which should be faster still) could be just uploaded into the CPLD.
One advantage though of the DPv2 is that because it's quite small and uses mostly surface-mount components, it might be possible to get a batch of fully finished, programmed and tested boards at reasonable price. Minimum quantities are quite likely to be a problem for that though.
For those interested in the detail, the DPv2 board differs from the original XT/IDE not only because of the CPLD, but also it's 3.3V based (there's a voltage regulator on it). 3.3V logic levels have been designed to work with 5V TTL components and offer some advantages besides power consumption, but here the reason for this choice is that 5V CPLD components are becomming hard or at least more expensive to get, and some manufactures will be discontinuing 5V parts within the next year or so. But this raises the question of compatibility with older drives and system boards, which is precisely why I want to circulate this assembled and working board to assess quite how compatible it is.
Time is something of the essence here; the board has been a long time coming and I want to press on with the next development sooner rather than later. 20 testers taking 2 weeks each would be another year gone so I don't know how successful this will be, but I think it is at least worth a go. Especially if you have a big pile of drives and several systems, I'd really appreicate your input!
Finally, a small number of boards are still available if anyone would like to make up their own board. These are not kits however (just a bare board) and being fine-pitched SMT you'll need some equipment such as temperature-controlled soldering iron, flux, wick and isopropynol. The boards are however available free (or near enough free anyway).
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