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Heathkit H11A / PDP-11/03 restore - hit a wall

Theodric

Member
Joined
Aug 22, 2011
Messages
12
Location
Zürich, Switzerland
Long-time lurker, first-time poster. This is ultimately a cry for help, because it’s not working, but I’m an excessively wordy person so there’s a long preamble before I get to it.

Picture gallery: https://imgur.com/gallery/tZA85

—BACKGROUND—

A couple months ago, I acquired a Heathkit H11A from a seller in the USA. The seller reported having powered it up, but did no other testing, since he’s not a techie guy. It had evidently sat in a storage locker for quite some time, and found its way to eBay when he was tasked with clearing out the estate of a former CDC engineer by the widow. He shared the anecdote that one of the H89s occupying the same storage locker found its way into Stranger Things, and that Netflix was not bothered about paying an additional $300 for next-day shipping on a system they’d bought for $300. That’s about as nearby to fame as I’m ever likely to get, so I’ll take it.

It arrived in fairly good shape, apart from the fact that all but one of the expansion cards had shaken loose during shipping. (I don’t see any obvious damage to any of the cards.) One of the brass screw insert lugs on the side panels had cracked the boss it was installed in, but I was able to reassemble and patch the boss with two-component resin: it’s almost, but not entirely, invisible. There was a small amount of surface rust on the steel parts, and a couple tiny patches of aluminum corrosion elsewhere, but the casing otherwise looked good.

Based on this post, I surmise that the Heathkit backplane is Q16 configuration, which will need to be modified to support 18- and 22-bit cards: https://groups.google.com/forum/#!topic/alt.sys.pdp11/YwsiIH3rWe8

The system contains five cards:

-DEC M7270 LSI-11/2 CPU with the optional 3015D EIS/FIS IC socketed
-An anonymous 32KW memory card, populated with 32 ITT 4116 SRAM ICs. It looks like a hand-built commercial product (“ASSEMBLED IN MEXICO”), with a high-quality etch and mask job, but handwritten S/N and P/N and what looks like a hand-drawn layout with manual scoring between some close-together traces. No manufacturer listed. I wasn’t able to locate any information on the card by searching the P/N, but maybe someone will recognize the card.
-A Heathkit H-11-5 serial card, with attendant breakout cable and DB25 adapter
-An Andromeda Systems FDC-11B and its 50-pin cable. I surmise that this is a Floppy Disk Controller, but found no useful information online.
-An Andromeda Systems LPI-11 and its Berg to flat cable to Berg to Centronics-breakout-PCB thingy. I surmise that this is a Line Printer Interface, but again, found nothing online.

—RESTORATION WORK—

I focused first on ensuring that the PSU wouldn’t kill anything (assuming the seller’s smoke test hadn’t done so already) by replacing all of the PSU’s electrolytic capacitors, both cans and tantalums, as well as one crusty 7805 and one 74LS00. (The tants might have been fine, but I’ve seen too many “Roman candle” failures in Commodore PETs to want to toy with that. Apart from the 74LS00 that I found was causing RUN/HALT to stick high, all of the removed components including the elderly 7805 tested out fine.) After all that was done, I dialled the PSU in according to Heathkit’s specifications and ran through all of the preflight checks (apart from intentionally blowing the fuse) with success. I am therefore relatively comfortable in stating that the PSU is working according to plans. Based on http://www.classiccmp.org/cini/heath_h11.htm it seems that my H11A is one of the earlier ones with no front-panel control over the LTC/EVNT signal. The PSU will generate it unless a jumper is set appropriately to disable. That explains why my VOM measures a constant ~5V on EVNT.


—BRING-UP FAILURE—

I found conflicting information online about the correct order of modules in the backplane, but the possible permutations are few: either the CPU goes on the left and the SRAM on the right (majority vote) or the opposite (minority). The Heathkit docs all assume the original quad-width PDP-11/03 CPU card, rather than the M7270, so they were of no help. The system showed marginally more signs of life in the first order, so I stuck with that.

The SRAM card has 16 DIP switches, which I surmise are bank selects, based on my reading of the DEC M8044 documentation. When I received it, the 16th switch (top 4KB?) was turned off, which I believe is explained on http://www.classiccmp.org/cini/heath_h11.htm by the following: “Since I/O devices are memory mapped, the upper 4kw of memory is disabled resulting in a net 28kw of memory.”

With CPU in top left, SRAM in top right, and serial directly under the CPU, with RUN/HALT switch in either position, the RUN light pulses twice when DC power is switched on, and once when DC power is switched off. I have yet to determine what, if anything, this signifies. No output is observed on serial.

If I toggle all the SRAM card’s DIP switches off, the RUN light stays on when DC power is switched on regardless of RUN/HALT switch position; toggling them any other way has no apparent effect, otherwise.

The M7270 CPU card has four different startup modes: one which attempts to boot from a given address and falls back to μODT on failure, one which always drops to μODT, one which attempts to boot from another address and prints that address to the screen if it fails, and an unused 4th mode for future use. I tried all of them, but none resulted in any output on serial. I also tried enabling and disabling jumper W3 (EVNT interrupt), but it changed nothing. I confirm that jumper W1 “Master Clock Enable” is wire-wrapped closed on my CPU card.

I ran through the documentation for the serial card and confirmed that it is configured according to the factory recommendations, putting the card at the correct address to function as a console @ 600,8,n,1.

I pinouted the cable supplied with the serial card and confirmed that it is wired such that it should be able to talk to my PC’s serial port with a null modem cable in between.

I removed, cleaned, and reinserted all ICs on the serial card (some were blackened with corrosion), but there was no change. Nearly all of the components on the serial card are commodity 7400-series logic, and the remaining two are widely available.

—CRY FOR HELP—

Since the M7270 has no RAM onboard, the minimum viable configuration would seem to be the CPU, RAM, and serial cards.

I bought a couple M8043 DLV11-J cards from Sellam, but do not have them yet.

Since the backplane is evidently Q16, I would need to bus BDAL16 and BDAL17 to make it Q18-compatible, a prerequisite for using later CPU cards or e.g. M8044 RAM modules (which, based on http://web.frainresearch.org:8080/projects/pdp-11/memory.php are 16-bit memory but require an 18-bit bus). I’m not sure if the M8043 requires Q18, either. Because the H11’s backplane is not identical to comparable DEC backplanes, I can’t make use of existing templates for DEC H9xxx backplane upgrades, so I’m not immediately sure what solder points I need to join up to achieve this.

The backplane does have a single additional wire connecting two pins on its third row. I have not yet tried to ascertain what this is for, since I’m only using the first two rows at this point.

Help, please? Not sure where to go from here. I am not an EE, but rather a failed Baroque cellist with an interest in vintage computers and a passing ability to read documentation and follow clear instructions, but please assume you’re talking to an idiot. I solder quite competently, and own a VOM and a cheap oscilloscope.
 
This thread contains a bit more information - so let's go from here...

I would ensure the chassis and PSU are working OK first. I see you have done some work on this.

Check the DCOK signal etc.

I would then propose using the CPU and Heathkit serial cards ONLY.

The first thing would be to note down all of the link and switch settings so we can see how things are currently configured.

We need to ensure that one of the Heathkit serial ports is configured as the console and the CPU car d is configured to power up into ODT. We do not require a memory card to be installed for this test. We should be able to use ODT to examine and modify CPU registers and manipulate the I/O registers of the serial card.

We would then look to add the memory card - and ensure it can be addressed with ODT and then get to the other I/O devices to complete a system.

Does this make sense?

I will hunt out the Heathkit manuals and have a look at the link/switch configuration required.

Dave
 
The main CPU (M7270) just requires configuring for no LTC enabled (W3 installed) and power-up mode 1 (micro ODT) with W5 installed and W6 removed.

The serial card (H11-5) requires configuring for a base address of 177560 and V60 - along with serial parameters to match your terminal (or whatever you are connecting the card to).

The M7270 manual (http://cini.classiccmp.org/pdf/DEC/m7270.pdf) also contains a "power up check procedure" in section 2.4 on page 2-8 (with no cards installed). This should be applicable to the Heathkit backplane.

Dave
 
Thanks, Dave! I haven't got it to respond yet, but here's what's been done so far:

--POWER--
Power-up check: the M7270 manual specifies that +5V on Row 1, Slot A, Pins A2 and V1; and +12V on pin D2.
-> Confirmed, the expected voltages are there.

DCOK:
The H11 Assembly Manual locates DCOK on the grey wire exiting the power supply into the backplane gangplug.
-> I measured 4.62V on both the point that DCOK enters the backplane, and at Row 1, Slot B, A1, as per the M7270 manual. Is 4.62V high enough?

--CPU BOARD--
The M7270 board was configured exactly opposite to your notes.
IMG_20210317_162612-b.jpg
Now updated:
IMG_20210317_203346.jpg

--SERIAL CARD--
The serial card baud section was configured bizarrely, but the metal jumpers would indicate that it was wired in what the H11-5 manual defines as "H9" (Heathkit glass TTY) mode.
IMG_20210317_162631-2.jpg

I used the worksheet in the operation manual to check that the jumper settings for address and vector were correct for a console serial device: they were. I also ensured that the stop bit, parity, and EIA (as opposed to 20ma current loop) jumpers were set correctly: yes, again. I then reconfigured the board to 300 baud.
IMG_20210317_174314-2.jpg

Notably, an installed jumper produces a logic level of 0, and removed 1. This extends to the toggle switches for setting the baud rate, as well, which I confirmed by checking the H11-5 "H9" baud jumper settings against the truth table for baud rates and the H9 assembly manual. It was either going to be 600 or 4800 baud, and the H9 uses 600 baud by default.
Screenshot 2021-03-17 at 20.53.48.jpgScreenshot 2021-03-17 at 20.54.08.jpg

--BOARD INSTALLATION ORDER--
The Heathkit documentation unhelpfully assumes a quad-width CPU board.
Screenshot 2021-03-17 at 16.48.37.png
Someone else online also encountered the same "wisdom" I did a while back about placing the CPU into the upper-left sockets, but found that his 11/23 CPU worked only in the upper-right. Mine is installed in top right.
Screenshot 2021-03-17 at 19.21.09.png


--TEST--
My chassis has the ribbon cable which connects to the serial board and terminates in one of those funny square gang sockets, as well as a corresponding gangplug which breaks out into a DB25 female.

I connected it up to my trusty FTDI USB dongle with both straight-through and null-modem DB25-DE9 cables, but got no useful output on serial when I powered on, enabled DC ON, and toggled RUN/HALT. "Useful" means that I see a "." in the terminal program whenever I toggle main power, but I assume that to just be a manifestation of line noise.

Next I will really-super-confirm the serial port wiring is correct. I believe I did this back in 2018, but no harm in checking again.
 
Just for funzies, I checked DCOK with my cheap DSO scope and it looks to be a clean 4.25V signal.
While I was in there, I pulled the EVNT jumper on the power supply and confirmed that a nice 50Hz square wave for the LTC is generated when the jumper is removed, and a ~4.8V constant signal when it is installed, as per spec in the Operations Manual.

I then decided to look at the backplane a bit and make sure it's sane.
Here's a file which shows the expected mapping for a 22-bit backplane: https://www.ibiblio.org/pub/academic/computer-science/history/pdp-11/hardware/qbus.backplane

I confirm that the P/N 85-2001-1 mfr.022577 "121476 ©1976" backplane is wired for 18 bits; signals BDAL00 thru BDAL18 are fully bussed. The contacts for BDAL18-21 exist in the sockets, but are not interconnected on the backplane. Any indications online that the H11 backplane is only wired for 16 bits are spurious.

All of the lines (BDAL, BPOK, DCOK) I checked had solid continuity, and the Fluke reported a resistance of between 0.3-0.5Ω.
One slightly funny thing: the SRUN line on the backplane is connected ONLY to CH1 (i.e. the left-hand-side pair, not the ones at the end of the bus), and is not bussed to AH1.

The Operations Manual has this to say about SRUN: "The RUN indicator monitors the SRUN L line, a non-bussed backplane signal, which is a series of pulses occurring at 3-5 us intervals whenever the processor is in the Run mode. Transistor Q101 is an emitter follower that isolates a 200 ms one-shot, IC102A, from the SRUN L line. Since this signal is occurring at a rate faster than the one-shot timing, the one-shot remains triggered and lamp PL202 is turned on. When the processor is in the HALT Mode, the SRUN L pulses cease. After a 200 ms delay, the one-shot resets, turning off PL202."

This would seem to suggest that the CPU would be asserting RUN on this pin to light up the RUN light on the front panel, but if the CPU isn't installed in this socket, and the line isn't bussed, how could it do that?
Nobody can seem to decide whether dual-width CPU boards belong in the top-row C-D or A-B sockets in the H11; I see successes AND failures reported with either. Might this suggest that C-D is the correct location?
Meanwhile, as per my last post, the fellow who shoved a later LSI-11 into his H11 discovered that it only wanted to work in Row 1 A-B. What do you think, should I bus SRUN over to A-B?

My H11 is badged as an H11A, which notionally shipped with the dual-width M7270 CPU board, but has the earlier two-switch front panel (LTC control by PSU jumper instead) of the original H11 which shipped with a quad-width LSI-11 CPU...which would necessarily have occupied all of the top row A-B-C-D sockets.

I shoved the M7270 into Row 1 C-D and tried the H-11-5, the SRAM board, and nothing at all in A-B. With the CPU in that position, I see 3.45V (a very jiggly 3.45V when I scope it) coming out of SRUN irrespective of the position of the RUN/HALT switch for as long as DC power is switched on. The attendant "RUN" LED is also lit throughout.

With the M7270 in A-B, unsurprisingly, SRUN remains dumb (actually reading -0.33V relative to GND) and the "RUN" LED does not light. Toggling RUN/HALT does nothing.

The RUN/HALT switch does cause the HALT line to read 0V at HALT and 3.45V at RUN, suggesting that it is working correctly.

Perhaps something is jacked on the LSI-11, if it's permanently stuck into RUN. If I'm lucky, it's one of the commodity TTL chips. I would have to grow an additional few brain cells before I can tackle that.

Unfortunately a thermal camera isn't in the budget right now due to house purchase and impending US tax bill, but I did scan my IR thermometer over the M7270 and H11-5, and found nothing worryingly hot when the the system had been powered and DC power switched on for 5 minutes, although the 74LS14 next to the DEC 1611H on the M7270 was pushing 40ºC.
 
Only just spotted your moderated post coming through. Keep at it, the mods. will eventually leave you alone :).

4.62V is fine.

Let me check the serial port configuration again. I remember a little trick that you had to do with the DLV11-J. I wonder if this card requires the same trick?!

I would have thought (assuming the backplane is an AB type) that it wouldn't matter for this test which slot is used for the processor or serial card (unless there is some specific wiring for DCOK etc. to a specific slot or half slot). Let me have a hunt...

EDIT: What actual connections are you using on the 25-way connector? I think there may be some 'gotchas' here.

Are both H1 (break enable) and W30 (negative voltage buffer supply) installed (out of interest)?

Dave
 
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I find the cabling in the H11 serial manual a little confusing (shall we say) at best...

I would check with a multimeter (power off) that the following connections are made...

Your terminal transmit signal is connected to the H11 serial card IC23 pin 1. This is the EIA receive data line.

Check that the H11 serial card has a link between IC23 pin 3 and IC21 pin 12. This is the EIA TTL level receive signal to the UART.

Check that the H11 serial card IC24 pin 6 is connected to your terminal receive signal. This is the EIA transmit data line.

There should *** NOT *** be a connection between IC21 pin 12 and IC16 pin 3 (this is the current loop receive data TTL signal).

Also, make sure that your terminal's GROUND line is connected to the H11 ground (check for continuity to IC24 pin 7).

I have a bit more data on the backplane for you I will post later - got to run for a meeting...

Dave
 
I am just thinking out aloud here...

There were two (2) variants of the Heathkit H-11. A quad-height CPU (H-11) and a dual-height CPU (H-11A). I wonder if you have an H-11 system/backplane but with an H-11A dual-height CPU?

From the H-11 manual it clearly states that the SRUN signal is wired to AH1 (J2A) only.

Looking at the schematic for the quad-height CPU I see that edge connectors AF1 and CH1 are both wired to SRUN.

On the dual-height CPU card it is AF1 and AH1 that are both wired to SRUN.

On the LSI-11 bus, both of these signals are classed as 'spares' - but re-purposed for use by the CPU as SRUN.

If you have traced the wiring from the SRUN backplane to CH1 then one of two possible things come to mind:

1. Heathkit have only made the backplane that you have to work with the quad-height CPU board.
2. A dual-height CPU card will have to be plugged into the C/D slots to physically drive the RUN lamp.

If you plug a dual-height CPU card into the C/D slots - then the CPU AH1 edge connector effectively becomes CH1 and things may (miraculously) work.

Whichever slot you chase the SRUN wire back to must (therefore) be the slot that should have the CPU card in it - unless Heathkit have made a mistake (in which case there may have been an errata sheet that was shipped that we don't have).

Can I ask that you investigate the backplane wiring a bit from the soldered cables specifically for the SRUN signal?

The other thing to consider is one person's definition of 'not working' may not be the same as someone else's... Someone may have incorrectly assembled the CPU, memory, serial and disk controller into a non-functioning chain - hence the 'non working' configuration.

In my thought experiment (using just a CPU and a serial card with ODT) it shouldn't matter one iota where the two (2) cards are actually placed. We are not using interrupts or DMA, so none of the chains need to be intact for this configuration to work correctly.

From my reading, the backplane should be a 'serpentine' construction so it should (really) go Slot 1 A/B -> Slot 1 C/D -> Slot 2 C/D -> Slot 2 A/B -> etc.

However, in this case, the Slot 1 configuration doesn't appear to follow where the SRUN signal is actually connected to?

I'll stop posting now and await your response...

Dave
 
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Glad I found this thread. I'm trying to evaluate the condition of my H11A (2-switch - single dual-width CPU card). The lack of any overall configuration and checkout documentation is odd, but hopefully there's enough information here to feel my way through.
 
So, what I have here is a two-switch H11 with:
  • Quad-width LSI-11 CPU board
  • (2) 4K x 16 H11-1 memory boards
  • 16K x 16 WHA-11-16 memory board
  • H27 diskette controller
  • (2) H11-5 SLU

I also have, separately:
  • H11-2 parallel I/O board
  • DEC DLV-11J SLU board

Along with a big (and incredibly heavy) H27 dual-8" drive subsystem (RX-01 equivalent)

I have all the Heath assembly and operation manuals. Just starting to go through the hardware to evaluate condition before I apply power to anything.
 
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Is there a Heath document that outlines basic operational check and configuration for an H11? The assembly manual goes as far as "plug in the CPU board and close the case. That's not like Heath to throw operation up in the air like that. I gather that I should install one of the SLU boards and try to bring the system up in 'ODT' mode, but what are the configuration steps to get there? I did read through K11F processor manual a bit, but it seems aimed at system integrators, not users. Would appreciate any pointers for approaching this.

I found the chapter on KD11F hardware configuration. Unfortunately, the location diagram doesn't correspond at all with the board I have. Worse, the jumpers that are on the board are not labeled.

Grrrr. Most common LSI-11 manual doesn't show the Heath rev. See lower diagram:
 

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I fear (if we are not careful) that we may have two separate (and different) threads running together that may end in confusion.

Could I suggest creating a new thread for yours and copying your posts into it?

If you can identify any module number and/or identification for your 11/03 CPU card and (possibly) post a high-res scan or photograph of it on a file share site somewhere I can have a look for you tomorrow.

Dave
 
Thanks, Dave. That's a sound suggestion! In the interim, I located a more in-depth document that covered the various board revisions - Heath (REV E) included. See my edited message above. I'm off to do some wire-wrapping.
 
Sorry for the lag. Life, uh, gets in the way, and I don't like turning in partially-completed homework.

H-11-5 serial board:

> What connectors are used on 25-pin connector:
(according to Heathkit numbering) 1,7,8,11,12,15,17,24,25.

I've mapped their functions through from the DB25 to the serial board in the following image, including the function names on both ends: https://imgur.com/C8SIdGE
The wiring seems a bit...funny. Broadening scope to the entire 24-pin gangplug in between the 25-pin ribbon connector and the DB25F, *I think* it is not wired correctly according to the serial board's manual, although the big stuff (e.g. TxD, RxD, GND) ends up in the right place.

> Your terminal transmit signal is connected to the H11 serial card IC23 pin 1. This is the EIA receive data line.
CONFIRMED

> Check that the H11 serial card has a link between IC23 pin 3 and IC21 pin 12. This is the EIA TTL level receive signal to the UART.
***NO!***

> Check that the H11 serial card IC24 pin 6 is connected to your terminal receive signal. This is the EIA transmit data line.
CONFIRMED

> There should *** NOT *** be a connection between IC21 pin 12 and IC16 pin 3 (this is the current loop receive data TTL signal).
CONFIRMED

> Also, make sure that your terminal's GROUND line is connected to the H11 ground (check for continuity to IC24 pin 7).
CONFIRMED, DB25 pin 7 has continuity to IC24 pin 7.


Backplane:
I disassembled and scanned the backplane, as well as the CPU and serial modules.
Some nice high-resolution images are posted at this location, for as long as Imgur exists (click pics to make them bigger; the backplane images are nearly 7000px wide): https://imgur.com/a/NkZ5Lbp

The slot numbering does appear to be serpentine.

CH1 connects to SRUN
AH1 definitely goes nowhere-- NC
AF1 (and CF1) are also NC
AP1 and CP1 are both wired to HALT.

The backplane has four dates on it either in mask or etch, which are (American date format MM-DD-YY):
Front mask: 121476
Front etch: 022577
Rear mask: 121476
Rear etch: 102877

The latest date in this list puts it in late 1977.
The 1978 Heathkit catalog shows a two-switch H11 badged "H-11" and the ad copy specifies a KD11-F a.k.a. M7264 CPU module, which is a quad-width board. http://joe.classiccmp.org/hk/p70.jpg

-> I therefore surmise that this backplane spin was designed for a quad-width CPU, and that that H11A badge on my system is misleading, since the rest of the system appears to be a plain H11-- possibly a late or transitional one, or just a pile of random parts?

I would think that the dual-width CPU board should work in either slot, since the RUN/HALT control is bussed to A/B and C/D. What will not work is the RUN LED, since it requires the CPU to assert SRUN, which is only connected to CH1.

Rather exhausted; will stop rambling and push this post over to the mods for review. Just a few more to go before I am considered trustworthy! :)
 
I made a questionable and impulsive decision and sourced a PDP-11/23+ M8189 CPU+SLU+bootrom board, sold as working with warranty. So far it's not doing anything useful in the H11 chassis, despite being configured according to http://www.willsworks.net/pdp-11/boards: it just stays halted with all four diag LEDs lit, regardless of what I tell it to do. I ran through the H11 PSU checks again, but they all still pass with flying colors. I thought that perhaps if two CPUs in a row didn't want to live, the issue may lie somewhere else, but it's slow and clumsy going for me on this.

Am having a look at M8189 board layout now, just to confirm the RUN/HALT switch wiring in my backplane connects to something on the CPU board. And perhaps I'll be happy to have that warranty.

If I want to try and solve this with nothing but a firehose of money, there is a period-correct M7264 available on the auction site now, but it's not sold as known-working, so that's a risky buy.
 
Sorry, in the ‘move’ I have lost touch with this thread.

Let me have a think and see what we can do...

Dave
 
I haven't given up yet. The firehose of money has emitted a QProbe and QBone (which unfortunately cannot yet emulate a CPU), but I am only partway done with assembling them. Working on getting the "correct" CPU board for the system, also, just to rule out any unnecessary weirdnesses.
 
I haven't given up yet. The firehose of money has emitted a QProbe and QBone (which unfortunately cannot yet emulate a CPU), but I am only partway done with assembling them. Working on getting the "correct" CPU board for the system, also, just to rule out any unnecessary weirdnesses.

We're traveling the same path together :). I'm also wrestling with an H-11 and ended up with QProbe, QBone, Bus grant and extender boards - on top of purchasing another (working!) CPU. The Heath and DEC bits are now working and passing XXDP 11/03 diagnostics. The system misbehaves badly with QBone active, so still some issues to dig through. Latest arrival is a Hantek 32-ch logic analyzer with which I hope to get a handle on QBone misbehavior.
 
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