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Looking for Z80 replacement

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  • Chuck(G)
    replied
    My old SAG has "Scratchpad value for use within BDOS". So I was close.

    Leave a comment:


  • exidyboy
    replied
    scua_newsletter_backup_88_04_doubling_ram_bondwell.pdf
    Originally posted by Ruud View Post
    I have a Bondwell 14 and want to add more memory to it.
    Please find attached (hopefully) an excerpt from the Sorcerer Computer Users Australia (SCUA) newsletter April 1988 detailing a scheme to double ram in the Bondwell 12 and 14.

    Leave a comment:


  • ldkraemer
    replied
    exidyboy,
    That is what Google Translate produces with the leading 000: prefix. Without the leading 000's it's
    "Notation area for the BDOS; the initial value is not of importance."

    So, it appears Chuck is correct.


    Larry

    Leave a comment:


  • Chuck(G)
    replied
    My guess without checking my own manuals is "scratch area".

    Leave a comment:


  • exidyboy
    replied
    Hi Larry,

    Great read.

    Under the heading "The DPH contains the following data:"

    is '000: Stroke area' the correct translation ?

    Leave a comment:


  • ldkraemer
    replied
    Here are the first two sections of the Document I previously posted:
    Code:
    
    Bondwell 12 Virtual-disk
    
    by M.J. Moene
    http://www.eld.leidenuniv.nl/~moene/Home/museum/Bondwell12/bgg-vdisk/
    
    Preface
    
    When using programs that frequently or frequently do disk I/O, such as translators (compilers and assemblers) and programs that use
    overlay files (eg WordStar), the relatively slow disk I/O of the floppy - often experience disk drives as annoying. The available
    storage capacity of both drives (166 kbyte each) is sometimes too small. These disadvantages of floppy disk drives with respect to
    speed and (temporarily) available capacity can be overcome by using a disk simulated in memory: a virtual disk.
    
    In this article I describe how a virtual disk can be implemented in the Bondwell 12-CP/M 2.2 operating system. The memory space
    required for the virtual disk can be obtained by expanding the memory with eight 64 kbytes of dynamic RAMs. The hardware of the
    Bondwell 12 provides the possibility to add these two additional 32 kbyte memory banks. A small hardware extension makes it possible
    to add 32 kbyte (= 256 kbytes) instead of two, eight additional memory banks.
    
    
    Content
    
    H 1. The CP/M control system
    H 2. Expansion of the BIOS with a virtual disk
    H 3. Memory bank selection
    H 4. 256 kbyte memory expansion
    
    
    1. The CP/M operating system
    
    1.1. Preface
    An operating system is intended to provide control over the peripheral equipment, such as, for example, terminal, disk drives and
    printer, in a way that is independent of the hardware structure of that peripheral equipment. CP/M is such an operating system.
    
    CP/M is made up of five parts:
    
        BIOS: Basic Input Output System,
        BDOS: Basic Disk Operating System,
        CCP: Console Command Processor,
        TPA: Transient Program Area,
        MWA: Monitor Work Area.
    
    The BIOS takes care of the basic operations needed to control the disk drives and the usual peripherals, such as the terminal and
    printer. The BDOS provides disk management and control of the peripherals, using the BIOS. CCP executes the commands that come from
    the keyboard. The TPA is the part of the memory that is available for the user programs (possibly extended with the space of CCP and
    BDOS). The MWA contains a number of system constants and buffers. Of these five parts, only the BIOS depends on the hardware system
    used. Adding a memory disk requires that the BIOS is adjusted.
    
    
    1.2. The Basic Input/Output System
    
    What needs to be adjusted in the BIOS? To investigate this, here is a description of the most important properties of the BIOS.
    
    The BIOS of the Bondwell 12 is made up of the following parts:
    
        jump-table,
        BIOS routines,
        disk parameter tables,
        function key table.
    
    ad 1.
        The jump-table serves to call the BIOS routines. At address $ 0001 and $ 0002 in the MWA you will find the address of the second
    jump instruction of the BIOS jump-table. This means that the location of the entire BIOS jump-table is known.
    
    ad 2.
        The BIOS routines can be divided into three groups:
    
            system initialization,
            ASCII import and export routines,
            disk input and output routines.
    
        To add the memory disk, only the disk input and output routines are important.
    
    ad 3.
        The physical properties of the used disk drives are fixed in three disk parameter tables:
    
            Disk Parameter Header table (DPH),
            Disk Parameter Block table (DPB),
            sector translate table (XLT).
    
    ad 4.
        The function key table consists of 16 x 16 bytes for the sixteen function keys. The table covers the address area $ F6BF .. $ F7BF.
    I will not describe this table further.
    
    
    The BIOS routines
    
    The data on the floppy disk is organized in tracks and sectors. (see figure 1.2.1.)
    
    \ --- + --- /
                   | \ - + - / |
                   || \ - + - / | o ---- track (circle)
                   ||| \ | / |||
                  - +++ - O - +++ -
                   ||| / | \ ||| \
                   || / - + - \ || ) - sector (circle segment)
                   | / - + - \ | /
                   / --- + --- \
    
              figure 1.2.1. tracks and sectors on a disk
    
    
    The data transfer to and from disk takes place via a so-called DMA buffer (Direct Memory Access buffer). The data is exchanged per
    record of 128 bytes between the DMA buffer and the disk. The records are indicated with a track and sector number.
    
    The BIOS contains the following disk input and output routines:
    
       home: Bring the read head to zero track of the selected drive:
                normally on the first tracks is the CP/M operating system
                saved.
       seldsk: Select the disk drive, indicated by register c
                (0 = A:, 1 = B :); if the drive exists, then register pair hl
                the address of the Disk Parameter Header, otherwise
                register pair hl zero.
       settrk: Select the track of the selected disk drive, switched on
                give by the number in register pair bc.
       setsec: Select the sector of the selected disk drive, switched on
                give by the number in register pair bc.
       setdma: Use it for subsequent disk read and write operations
                address of the DMA buffer as indicated by register pair bc.
       read: Read the selected sector of the disk and place the data
                in the indicated DMA buffer; if the operation is successful,
                register a contains the value zero, otherwise a value is unequal
                to zero.
       write: Describe the selected sector of the disk with the data
                from the indicated DMA buffer; if the operation is successful,
                register a contains the value zero, otherwise a value is unequal
                to zero.
       sectran: Translate a logical sector number in register pair bc to it
                physical sector number in register pair hl; register pair the
                contains the address of the translation table sector; the difference
                between the logical and the physical sector number
                used to reduce the time required to successive sectors
                to read or describe to shorten (skewing).
    
    
    For the above routines, with the exception of home, the read/write head only really has to be brought to the selected sector in the
    read and write operations.
    
    The disk parameter tables
    
    The physical properties of the used disk drives are recorded in three disk parameter tables in the BIOS:
    
        Disk Parameter Header table (DPH),
        Disk Parameter Block table (DPB),
        sector translate table (XLT).
    
    The DPH is the link between the BDOS and the BIOS for the use of disk input and output. The DPH contains a draft area and the addresses
    of a number of buffers that are used by the BDOS. Furthermore, the DPH contains the addresses of the DPB and the XLT tables. The DPB
    describes the physical properties of the drive and the XLT table gives the translation of logical sectors to physical sectors.
    
    There is one DPH per connected drive. DPBASE indicates the start of the list of DPHs. In Figure 1.2.2. the format of the DPHs is shown.
    
    Disk Parameter Header
               + -------------------------------------------- +
        DPBASE | XLT | 0 | 0 | 0 | DIRBUF | DPB | CSV | ALV | Drive 0 (A :)
               + -------------------------------------------- +
               | :
               + -------------------------------------------- +
               | XLT | 0 | 0 | 0 | DIRBUF | DPB | CSV | ALV | Drive n
               + -------------------------------------------- +
                 16b 16b 16b 16b 16b 16b 16b 16b
    
               figure 1.2.2. list of Disk Parameter Headers
    
    
    The DPH contains the following data:
    
       XLT: Address of the translation table sector; if there is no skewing
               applied XLT has the value zero.
       000: Stroke area for the BDOS; the initial value is not of
               importance.
       DIRBUF: Address of a 128 byte large scratch buffer for directory
               operations performed by the BDOS; all DPHs
               can refer to the same buffer,
       DPB: Address of the Disk Parameter Block for this drive; drives
               with the same characteristics can refer to the same
               DPB,
       CSV: Address of a scratch area used for the off
               conduct a software check on changing the
               disk; each DPH refers to its own scratch area; if there
               not having to be checked, CSV has the value zero.
       ALV: Address of a scratch area used by the BDOS to
               the occupation of the disk, expressed in allocation-blocks,
               to keep up; each bit of the buffer establishes an allocation
               block for; a bit that has the value one indicates that
               the corresponding allocation block is occupied; every DPH
               refers to its own scratch area.
    
    The format of the Disk Parameter Block is shown in Figure 1.2.3.
    
    Disk Parameter Block
           + ----- + ----- + ----- + ----- + ----- + ----- + ----- + ----- + - ---- + ----- +
    A:, B: |  SPT  |  BSH  |  BLM  |  EXM  |  DSM  |  DRM  |  AL0  |  AL1  |   CKS  |  OFF  |
           + ----- + ----- + ----- + ----- + ----- + ----- + ----- + ----- + - ---- + ----- +
    
           + ----- + ----- + ----- + ----- + ----- + ----- + ----- + ----- + - ---- + ----- +
    Vdisk  |  SPT  |  BSH  |  BLM  |  EXM  |  DSM  |  DRM  |  AL0  |  AL1  |   CKS  |  OFF  |
           + ----- + ----- + ----- + ----- + ----- + ----- + ----- + ----- + - ---- + ----- +
              16b      8b      8b      8b     16b      16b     8b      8b      16b     16b
    
                     figure 1.2.3. two Disk Parameter Blocks
    
    
    The Disk Parameter Block contains the following data:
    
       SPT: Sectors Per Track.
             The number of sectors per track.
       BSH: Data allocation Block SHIFT factor.
             This is a number that depends on the size of it
             allocation-block (BLS: allocation BLock Size).
       BLM: Data allocation BLock Mask.
             The value of this is: 2 ^ (BSH-1).
       EXM: EXtent Mask.
             The value of EXM depends on the size of it
             allocation block and the total number of allocation
             blocks from this disk.
       DSM: Maximum Data block number.
             DSM shows the capacity of the disk in allocation-blocks:
             DSM = alloc-blocks -1.
       DRM: Maximum number of DiRectory entries -1.
             DRM gives the number of directory places -1 of this disk.
       AL0, AL1: ALlocated blocks for directory.
             AL0 and AL1 give the initial value for the ALV: this is used
             indicated which blocks are reserved for the directory.
       CKS: Number of directory sectors ChecK Summed.
             CKS indicates the size of the buffer for checking it
             changing the disk, expressed in sectors; there will be no
             control, then CKS has the value zero.
       OFF: Number of reserved system tracks (track OFFset).
             OFF indicates the number of reserved tracks at the beginning of the
             disk; these tracks can, for example, be used for the storage of
             the CP / M operating system.
    
    The value of BSH and BLM indirectly determine the size of an allocation block (BLS). The value of BLS is not mentioned in the DPB.
    The size of an allocation block is: 128 x 2 ^ (BSH), or 128 x (BLM + 1) [byte]. BSH and BLM depend on BLS as follows:
    
      BLS       BSH  BLM
     1024 byte   3     7
     2048 byte   4    15
     4096 byte   5    31
     8192 byte   6    63
    16384 byte   7   127
    
    BSH is used to determine in which allocation block a particular record falls: allocation-block nr = record number >> BSH.
    (j >> k: shift number j k-times to the right)
    
    BLM is used to determine the record number within the allocation block: place = record number & BLM. (j & k: bitwise AND of j with k)
    
    DSM shows the capacity of the disk measured in allocation-blocks. This does not include the reserved tracks at the beginning of the
    disc (OFF). The capacity of the disk is: BLS x (DSM +1) [bytes].
    
    The value of EXM depends on BLS and DSM as follows:
    
      BLS      DSM  < 256   DSM >= 256
     1024 byte      0            -
     2048 byte      1            0
     4096 byte      3            1
     8192 byte      7            3
    16384 byte     15            7
    
    The following considerations apply to the choice of the size of the allocation block (BLS): for the storage of large files, a large
    allocation block gives an efficient use of the directory space; for the storage of many small files, a small allocation block
    provides an efficient use of the available disk capacity: a file that is only a few bytes in size does use a whole allocation block.
    
    DRM gives the number of directory locations minus one. Al0 and Al1 are used as initial value for the allocation buffer (ALV) to
    reserve space for the directory. The value of DRM is decisive for the value AL0 and AL1. The concatenation of AL0 and AL1 can be 
    onsidered as a list of 16 bits (see figure 1.2.4.).
    
      + ------------------------------+------------------------------------ +
      |              AL0              |                AL1                  |
      + ----------------------------- + ----------------------------------- +
      | 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 |
      + ----------------------------- + ----------------------------------- +
    
                    figure 1.2.4. directory allocation-blocks
    
    
    Position 0 corresponds to the high-order bit of byte AL0, position 15 corresponds to the low-order bit of byte AL1. Each bit
    in this list reserves an allocation block for a number of directory locations, so that sixteen allocation blocks can be used
    for the directory. Each directory location covers 32 bytes. The number of allocation blocks required for the directory thus
    depends on the size of the allocation block. This dependency can be expressed as follows: number of directory allocation-blocks
    = (DRM + 1) / (BLS / 32).
    
    As many allocation-blocks as the directory needs, so many bits of AL0 and AL1 must be '1', starting with AL0 position 0.
    
    The value of OFF determines the number of tracks that will be skipped at the beginning of the physical disk. This value is
    automatically added to the track number when calling the routine settrk. This mechanism can be used to skip the tracks reserved
    for the operating system, or to divide a large disk into smaller parts.
    
    The explanation of the Disk Parameter Header ends with the CSV and ALV buffers. The size of the buffer for checking the disk
    (CSV) is equal to the value of CKS. The value of CKS is determined as follows: in the case of a removable disk, CKS has the
    value (DRM + 1) / 4: there are four directory locations per record. If it is a fixed disk, CKS has a value of zero (no check
    on changing).
    
    The size of the allocation buffer (ALV) is determined by the maximum number of allocation blocks of the relevant disk. The size
    of ALV is: (DSM / 8) +1 [bytes], namely one bit per allocation block.
    
    
    
    2. Extend the BIOS with a virtual disk
    
    2.1. Preface
    
    The operation of the BIOS is now sufficiently known to add a virtual disk to the BIOS. The addition requires the following actions:
    
        assign a free letter between A and P to the virtual disk,
        program the BIOS disk I/O routines for the virtual disk,
        make the virtual disk DPH, DPB and possibly the XLT table.
    
    The sequel describes the way in which the virtual disk is implemented in the existing Bondwell 12 CP/M 2.2 operating system.
    
    2.2. The vdisk program (version 1.5)
    
    2.2.1. Assumptions
    
    When creating a program for the virtual disk, the following assumptions are used:
    
        The CP/M operating system on the system disk must remain unchanged: the installation of the memory disk must be done by
        a separate program.
        For the memory space required for the virtual disk, the memory banks one and two are used; these are available through the
        standard 64 kbyte memory expansion of the Bondwell 12; due to the extra memory expansion of 256 kbytes, the memory banks
        one to eight are available for the virtual disk.
        The program must be suitable for both the 64 and 256 kbytes of memory space.
    
    
    2.2.2. Global operation
    
    The operation of the memory disk program can be summarized as follows. The calls from the BIOS disk I/O routines seldsk to
    write are redirected to the corresponding memory disk BIOS routines, so that it can be checked whether the memory disk is
    concerned. If it concerns the memory disk, the memory disk routine is further processed; if it concerns a different drive,
    the program will continue in the original BIOS routine.
    
    For the memory disk BIOS routines and the disk parameter tables, which have to be added to the standard Bondwell 12 BIOS,
    some memory space is needed that can not be used by other programs. This memory space is required in the common memory bank
    (common bank: address $ 8000 .. $ FFFF), because the other memory banks can only be accessed from this memory bank. This
    space for the memory disk BIOS routines is available in the BIOS from address $ F500 to address $ F6BF, where the function
    key table begins.
    
    Installing the memory disk includes the following actions:
    
        If desired, format the memory disk directory space.
        Overwrite the existing BIOS jump table with the virtual disk jump table as far as the relevant disk I/O routines are concerned.
        Copy the virtual disk parameter tables and routines to the free space in the BIOS.
        Replace the jump CCP at the end of the original BIOS warm boot routine with jump virtual disk hot-boat, so that it can be
        checked whether the default drive is the (now) legal virtual disk; if this is not done, the virtual disk is not considered
        legal by the original warm boot routine and replaced by drive A :.
    
    Figure 2.2.2.1. gives an impression of the memory usage of the virtual disk.
    
    
       $ FFFF + -------------- + 64 kbyte
              |     video      |
       $ F800 | -------------- |
              | -------------- |
              |  vdisk buffer  |
              |  vdisk-program |
       $ F500 | -------------- |
              | -------------- |
              |      BIOS      |
              |      BDOS      |
              |       CCP      |
              | -------------- |
              |       TPA      |
        $8000 + -------------- + 32 kbyte
                common bank
    
        $7FFF + -------------- + 32 kbyte $7FFF + -------------- + 32 kbytes
              |                |                |                |
              |                |                |                |
              |                |                |                |
              |                |                |      Vdisk     |
              |       TPA      |                |      track     |
              |                |                |                |
              |                |                |       n-1      |
              |                |                |                |
              |                |                |                |
        $0100 | -------------- |                |                |
              |       MWA      |                |                |
        $0000 + -------------- + 0        $0000 + -------------- + 0
                    bank 0             ...             bank n
    
    
            figure 2.2.2.1. memory usage of the virtual disk
    
    
    2.2.3. Realization
    
    This section describes the structure of the virtual disk program, the operation of the BIOS routines and the content of the disk
    parameter tables.
    
    Structure
    
    The memory disk program consists of the following parts:
      installation,
      formatting,
      jump-table,
      parameter tables,
      BIOS routines.
    
    These parts are explained in more detail below.
    
    
    Installation
    
    The memory disk installation is as follows.
    
    The installation routine determines whether the memory disk should be formatted ('-f' option). If this is the case, the installation
    routine copies the format routine to the available space in the Bondwell 12 BIOS (address $ F500 .. $ F6BF) and then calls it. If
    formatting is not required, this section is omitted. Furthermore, the installation routine copies the memory disk parameter tables
    and BIOS routines to the available space in the original BIOS. The jump to the CCP at the end of the BIOS hot-boot routine is
    replaced by a jump to the memory hot-boot routine. Finally, the installation routine overwrites a part of the original BIOS jump-table
    with the memory disk jump-table.
    Formatting
    
    The format routine initializes all locations in the memory bank (s) in which the memory disk directory is located with the value $ E5,
     which corresponds to an empty directory.
    
    Jump-table
    
    The jump-table ensures that when calling the BIOS routines seldsk to write, you first jump to the corresponding memory disk BIOS
    routine. Then, if necessary, the original BIOS routine is followed.
    
    Disk parameter tables
    
    The disk properties are defined in the disk parameter tables. The memory disk has the following properties:
    
    Disk Parameter Header
    
       XLT = 0: No sector translation is applied.
       DIRBUF = $ F2CD: Address of the directory buffer of drive A: and B :.
       DPB = ....: Disk Parameter Block, see below.
       CSV = 0: No check on changing the disk.
       ALV = ....: This is the address of the memory allocation buffer.
    
    
    Disk Parameter Block
    
       SPT = 256: There is exactly one track per memory bank; this gives one
                  simple calculation of the memory bank number and the
                  address of the sector in that bank.
       BSH = 4: The allocation block size is 2048 bytes.
       BLM = 15: The allocation-block size is 2048 byte.
       EXM = 1: The allocation-block size is 2048 byte and DSM <256.
       DSM = 31: Maximum allocation block number for the 64 kbyte disk.
                  (127 for the 256 kbyte memory disk.)
       DRM = 63: There are 64 directory places.
       AL0 = $ 80: One block is reserved for the directory.
       AL1 = 0: Idem.
       CKS = 0: No check on changing the disk.
       OFF = 0: There are no reserved tracks on the disk.
    
    
    BIOS routines
    
    The CP / M operating system does not need to be present on the memory disk. Furthermore, applying skewing for the memory disk will
    not give a speed gain. It follows that the home and sectran routine for the memory disk are not important. The following are the
    memory disk BIOS routines.
    
       seldsk: The drive number in register c is copied to the
               variable 'drive'; if it concerns the memory disk, then
               the register pair hl obtains the address of the memory disk Disk
               Parameter Header and the subroutine is terminated; concerns
               it is another disk, then the routine jumps to the original one
               seldsk routine.
       settrk: The track number in register pair bc is copied to the
               variable 'track' and the routine jumps to the original
               settrk routine.
       setsec: The sector number in register pair bc is copied to the
               variable 'sector' and the routine jumps to the original
               setsec routine.
       setdma: The dma address in register pair bc is copied to the
               variable 'dma' and the routine jump to the original
               setdma routine.
       read: The subroutine 'checkd' checks whether
               a sector must be read from the memory disk or from
               one of the floppy disks; it does not concern the memory disk,
               then the routine jumps to the original read routine; if
               it concerns the memory disk, the subroutine is 'getadr'
               called; this routine selects the correct memory bank
               (track of the memory disk) and returns the start address of the
               requested sector in said memory bank in register pair h1; the
               sector is copied to the local memory disk
               data buffer in the 'common bank'; with the routine 'bank' becomes
               memory bank zero selected again; then the
               memory disk data buffer copied to the dma address; the
               read routine ends with a zero in register a to the BDOS
               to indicate that the reading operation went well.
       write: The operation of the write routine is similar to that of
               the read routine; the direction of the data flow is however
               other way around.
    
    
    Other routines
    
        vdwbt: This routine is just after the original BIOS warm boot routine
               run through; the vdwbt routine checks the number of the
               default drive in the MWA matches the number of the
               memory disk. If the numbers match, it will be in register
               c the number of the memory disk is given to the CCP.
       checkd: This routine indicates whether the memory disk has been selected.
       getadr: The routine 'getadr' selects the memory bank in which the
               requested sector and gives it in register pair hl
               starting address of the sector in that memory bank. The calculation
               of memory bank number and sector start address is as follows:
               - the sector size is 128 bytes,
               - there are 256 sectors per track: 256 x 128 bytes = 32 kbytes,
                 so that each track covers a memory bank;
                 the number of the memory bank is: bank = track + 1:
                 the memory disk starts with a memory bank;
               - the first sector of each track starts at address $ 0 of the
                 memory bank corresponding to that track: the calculation
                 the starting address of a sector is therefore not dependent
                 of the track number; the starting address of a sector is:
                 address = sector x 128, or (sector x 256) / 2:
               - load register h with the sector number (sector x 256),
                 load register l with 0,
               - shift the contents of the register pair to a position
                 right (hl / 2),
       bank: The routine 'bank' selects the memory bank according to it
               number in register a. This routine is suitable for the
               standard 64 kbyte memory expansion of the Bondwell 12 as
               for memory expansion of 256 kbytes. The operation of the
               memory bank selection is described in chapter 3. The
               numbering of the memory banks in the 'bank' routine is different
               of the numbering in the Bondwell 12/14 manual: in the routine
               'bank' is the numbering as follows:
               - 0: Boot ROM,
               - 1..9: RAM bank 0..8.

    Larry

    Leave a comment:


  • Ruud
    replied
    Originally posted by lowen View Post
    The Z180/HD64180 are essentially completely signal-compatible with the Z80, ... You just need to make a socket adapter to make it a plug-compatible.
    I have thought about that idea as well. But I first thought was that the internal devices, who occupy 64 bytes of the I/O range, would give problems. I always thought that the I/O of the Bondwell occupies 256 bytes but it seems it is only 128 bytes. And as the I/O of the HD64180 is relocatable, I think it is doable. Back to the drawing board.

    Leave a comment:


  • lowen
    replied
    Originally posted by Ruud View Post
    ...
    But it is not pin compatible.
    The Z180/HD64180 are essentially completely signal-compatible with the Z80, as the Hi-Tech XLR8er among other speedup boards for Z80 systems showed. The '180 needs some programming to make it so, however, as the default number of wait states makes it slower than the Z80 at the same clock speed until the waits are reduced. You just need to make a socket adapter to make it a plug-compatible. The 64-pin SPDIP (0.7 inch pin spacing) package is marginally easier to adapt to the 40-pin dip over the 68-pin PLCC, but a simple adapter board shouldn't be a difficult layout and fab with 2-layer PC boards. The '180 has some significant speedups relative to the Z80, as well as some new instructions, but the commonly-used undocumented instructions that manipulate the upper or lower byte of IX/IY do not work like they do on the Z80.

    Now, the circuit Larry posted is known to work ok, as the same basic circuit was used by the 80Micro 320K memory modification for the TRS-80 Model 4; I made a slight modification to that circuit for my own stab at the 320K mod, and several others made similar mods for up to 2MB of RAM (using 41256's) in TRS-80 Model 4's and 4P's.

    In many Z80 designs, re-jiggering the CAS and RAS logic to support CAS before RAS refresh (which the CPU280 uses, incidentally) is far more of a challenge than just extending the refresh counter through the external logic Larry posted.

    Leave a comment:


  • Ruud
    replied
    Hallo Chuck,
    Originally posted by Chuck(G) View Post
    ... if CAS/ before RAS/ mode is used...
    I have thought about this as well but this will also so need quite some extra hardware. That is, when using TTL. I'm thinking about using a GAL as well.

    But I ran into another problem: when using the original hardware, I can only add four extra 32 KB pages. I still haven't completely figured out how Martin Moene did it with his virtual disk, in particular the use of Q0 and Q1 towards the LS174. It seems he uses Q0 and Q1 to select one of the 64 K blocks inside a 41256. But that will change the selected bank, even for just the moment to do the modification. Hmmm, when writing this I think I found it: the program is run from somewhere in the last 32 KB of the RAM as that is always present. (sorry, I'm not that good with CP/M configurations)

    I was willing to write that adding just two banks of 4164s plus some OR and AND gates could do the trick. But now I have to rethink things over.

    Later Z80 variants, like the 64180 had an 8-bit refresh counter.
    But it is not pin compatible.
    Last edited by Ruud; December 27, 2018, 03:02 AM.

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  • Chuck(G)
    replied
    Some 256K and larger chips don't need the refresh counter if CAS/ before RAS/ mode is used--the memory IC has an internal counter. Also, you can use the REFRESH/ signal and the A6 transition to add an extra bit or two to the refresh counter. Most 1M DRAMs have this facility.

    See here, for example

    Later Z80 variants, like the 64180 had an 8-bit refresh counter.

    Leave a comment:


  • Ruud
    replied
    Hallo Larry,

    Originally posted by ldkraemer View Post
    Interesting article that I converted Section 3 to end, to English.
    Well done!

    I also have a circuit that was used for the TRS-80 for 256 Refresh rate.
    Thank you!

    Leave a comment:


  • ldkraemer
    replied
    Interesting article that I converted Section 3 to end, to English.

    Code:
    3. Memory bank selection
    
    3.1. Preface
    
    In this chapter I describe the operation of the circuit that switches over the memory banks. Knowledge of this is necessary to be able
    to fathom the functioning of the memory bank selection routine and of the extra memory expansion.
    
    
    3.2. Operation
    
    In Figure 3.2.1. the scheme of the Bondwell 12/14 memory bank selection circuit is shown. With this circuit one of the three
    memory banks or the boot ROM can be selected. Bank zero is the normally selected bank, banks one and two are used for the
    memory disk.
    
    
    Address-bus
    ___________________________
         \                     \      address
         |     decoder         |      latch              decoder
         |                     |
         |      LS138          |      LS259               LS138
         |  +-----------+      |  +-----------+       +-----------+
         |  |           |      |  |           |       |           |
      A7 |\_| /E1   /Q7 |-     |  |        Q7 |-      |       /Q7 |
         |  |       /Q6 |-  A3 |\_|  A2    Q6 |-      |       /Q6 |
         |  |       /Q5 |-  A2 |\_|  A1    Q5 |-      |       /Q5 |
         |  |       /Q4 |-  A1 |\_|  A0    Q4 |-      |       /Q4 |
         |  |       /Q3 |-     |  |        Q3 |-    0 |       /Q3 |--o /bank2
      A6 |\_|  A2   /Q2 |-  A0 \_|  D      Q2 |-o   o-|  A2   /Q2 |--o /bank1
      A5 |\_|  A1   /Q1 |-        |        Q1 |-------|  A1   /Q1 |--o /bank0
      A4  \_|  A0   /Q0 |---------| /E     Q0 |-------|  A0   /Q0 |--o /boot-ROM
            |    /E2    |         |           |       |           |
            +-----------+         +-----------+       +-----------+
    ___________   |
    I/O-request   |
    ______________/
                       figure 3.2.1.  memory bank selection circuit
    
    
    In the figure, inverted signals are indicated by setting a '/' for the signal name. Signals that are not important for describing
    the operation of the circuit are not mentioned in the figure.
    
    The operation of the circuit is as follows.
    By offering a specific I/O address, one of the latches of the LS259 can be addressed using the LS138 decoder to the left of the
    diagram. The value of the latches zero and one of the LS259 determine which memory bank select signal is made active via the
    decoder LS138 on the right of the schematic (/ boot-ROM, / bank0..2).
    
    The operation is described in more detail below.
    When an I/O address is addressed where A7 is equal to zero, the LS138 decoder is enabled in the left-hand circuit diagram:
    this is $ 00 .. $ 7F in the I/O address area. I/O address lines A4 to A6 then determine which output of the decoder is
    activated. If output / Q0 becomes active, the addressable 'latch' LS259 is 'enabled': this is $ 00 .. $ 0F in the I/O address
    area. I/O address lines A1..A3 determine which latch of the LS259 is addressed, I/O address line A0 determines whether
    a '1' or a '0' is written in that 'latch'. Together, the outputs Q0 and Q1 of the addressable 'latch' form the input
    signal (0..3) for the decoder LS138, to the right of the diagram, which activates one of the memory bank selection signals.
    
    
    
    
    
    4. 256 kbyte memory expansion
    
    4.1. Preface
    
    In this chapter I describe the 256 kbyte memory expansion for the Bondwell 12. For this expansion it is necessary to make some
    changes on the Bondwell 12 computer board. Furthermore, a small circuit is required to generate some unavailable signals.
    Appendix 1 shows the complete diagram of the memory expansion circuit. Appendix 2 shows the component setup and print layout
    of the print made for the extension.
    
    
    4.2. Dynamic RAM
    
    What needs to be changed to use 256 kbytes of dynamic RAM instead of 64 kbyte for IC 53..60 instead of 64 kbytes? In order to determine
     this, we first look at the effect of dynamic RAM (see Figure 4.2.1.).
    
                                     +-------+
                           address   |       |   data
                   A7/A15 ---------\ |       | /------\  D7
                          |         \|dynamic|/        \
                          |         /|  RAM  |\        /
                   A0/A8  ---------/ |       | \------/  D0
                                     |       |
                                     +-------+
                   ___                 |  |
                   RAS ----------------+  |
                   ___                    |
                   CAS -------------------+
    
                         figure 4.2.1.  Dynamic RAM
    
    The use of dynamic RAM has two striking aspects, namely the addressing and 'refresh' of the memory locations.
    
    
    Addressing
    
    The access to a memory location in a dynamic RAM can be compared to selecting an element from a two-dimensional array:
    a row address and a column address must be presented to indicate the desired memory location. The addressing of a memory
    location is in the case of a dynamic RAM by the sequential presentation of the row address and the column address over
    the same address lines. The distinction between the driving address and the column address is indicated by the RAS
    (Row Address Select) and CAS (Column Address Select) signals.
    
    
    Refresh
    
    The value of a bit in a dynamic RAM is determined by the load on a small capacitor. In order to prevent 'memory loss' due to leakage
    of this load, the charge is periodically restored ('refreshed').
    
    This 'refresh' happens automatically for all memory locations of a row, when that row is addressed. In order to ensure that each
    row is addressed within a certain time required, the Z80 microprocessor provides special refresh addresses of the row addresses.
    The refresh counter of the Z80 takes care of the 'refresh' of 128 rows (A0..A6).
    
    The requirements for the memory-refresh of 64 and 256 kbytes of memory are:
    
         xx64: 128 refresh cycles / 2 ms (7 bit refresh counter: A0..A6),
         xx256: 256 refresh cycles / 4 ms (8 bit refresh counter: A0..A7).
    
    It follows that the Z80 microprocessor is unable to provide the refresh for 256 kbyte of dynamic RAM.
    
    
    4.3. Bankselect- & refresh-circuit
    
    To adapt the existing hardware of the Bondwell 12 to the 256 kbyte dynamic memories, the 'bank select & refresh circuit'
    has been created. It has the following functions:
    
        generation of A7 with refresh signal / A15,
        generation of A8 / A16,
        providing a control signal for an LED to indicate the activity of the memory disk.
    
    
    A7 met refresh/A15
    
    In order to fully 'refresh' 256 kbyte of dynamic RAM, address line A7 should also be part of the refresh cycle (see Figure 4.3.1.).
    
    Using the row / column (R / Cn) and refresh signal (/ RFR) of the Z80 microprocessor, the number of refresh cycles generated by the
    processor is maintained by the counter HEF 4040. Every time 128 refresh cycles are counted, the output Q7 of the counter HEF 4040
    is inverted. The LS151 switch determines on the basis of the / RFR signal whether the A7 signal to be output on output Y is normal
    or refresh address. As a result, A7 has also become part of the refresh cycle.
    
    Furthermore, the row / column signal determines whether the output signal Y of the switch LS151 contains a row address (normal or
    refresh address A7) or a column address (original A15).
    
    
                NOR-gate         counter
    
                   LS02           HEF 4040
         _       +-----+     +---------------+
       R/C o-----|     |     |               |
       ___       | >=1 |o----| CLK           |
       RFR o-----|     |     |  Q7           |
                 +-----+     +---------------+
                                |
                                |     switch
                                |      LS151
                                |    +-------+
                                |    |       |
       A7 org o-----------------|----| D3    |
                                +----| D2    |
       A15    o-----------------+----| D1  Y |-----o A7 + refresh
                                +----| D0    |
         _                           |       |        (xx256 RAM)
       R/C    o----------------------| B     |
       ___                           |       |
       RFR    o----------------------| A     |
                                     +-------+
    
    figure 4.3.1. generation of A7 + refresh / A15
    
    
    Address line A8 / A16
    
    By using 256 kbytes of memory, there are eight instead of two additional 32 kbytes of memory banks. To be able to address this memory
    space, two new address signals are required: A8 and A16 (see figure 4.2.2.). The other address signals are already available in the
    existing circuit.
    
                      8 bit-register         switch
    
                          LS174               LS158
                      +-----------+       +-----------+
                      |           |       |           |
                      | D7     Q7 |-      |           |
                      | D6     Q6 |-      |           |
                      | D5     Q5 |-      |           |
                      | D4     Q4 |-      |         Y |----o A8/A16
                      | D3     Q3 |-      |           |
                      | D2     Q2 |-      |           |    (xx256 RAM)
       LS259 Q1   o---| D1     Q1 |-------| B         |
       LS259 Q0  o---| D0      Q0 |-------| A         |
                      |    CLK    |       |     S     |
                      +-----------+       +-----------+
                            |                   |
       LS259 Q2   o---------+                   |
           ______                               |
       Row/Column o-----------------------------+
    
    figure 4.3.2. generation of A8 / A16
    
    
    
    The address signals A8 and A16 are made using the addressable latch LS259 of the original bank select circuit (see Figure 3.2.1.).
    Via the outputs Q0, Q1 and Q2 of this 'addressable latch' the A8 and A16 signals are placed in the 8-bit register LS174. The Q2 output
    of the LS259 carries the clock signal for the 8-bit register LS174.
    
    The row / column signal determines whether the output signal Y of the switch LS158 contains the row address (A8) or the column address (A16).
    
    
    Indication of the memory disk activity
    
    Figure 4.3.3. shows the circuit for indicating the memory disk activity.
    
                  NOR-gate         one-shot
    
                          LS02             555
                                    +---------------+
                        +-----+     |               |   R
         LS259 Q2 ------| >=1 |o----| /T            |--===--o
                        +-----+     |    D THR      |         LED
                                    +---------------+       o
                                      R   ||   C            |
                                <----===--++---||---|      ---
    
    figure 4.3.3. memory disk activity indication
    
    
    The signal indicating the memory disk activity is derived from the output signal Q2 of the addressable latch LS259 of the original bank
    select circuit (see Figure 3.2.1.). The output Q2 becomes briefly '1' when one of the virtual disk memory banks is addressed. This
    short pulse is extended by the 'one-shot' 555 to approximately 10 ms. The output of the 'one-shot' is suitable for controlling an LED.
    
    
    4.4. Installing the memory expansion
    
    Adding the 256 kbyte memory expansion to the Bondwell 12 hardware entails the following actions:
    
        removing four connections on the computer board,
        making two new connections on the computer board,
        connecting the expansion board to the computer board.
    
    The I.C. numbers listed below are indicated on the computer board.
    
    
    Connections to be removed
    
    Print side    Signal     Interrupt between
    Components    A8         IC52, pin 8  (74LS32)  --  IC53, pin 1  (xx256)
    Components    A8         IC60, pin 1  (xx256)   --  IC61, pin 15 (xx256)
    Components    A7         IC60, pin 9  (xx256)   --  IC61, pin 9  (xx256)
    Solder        A7         IC59, pin 9  (xx256)   --  IC44, pin 9  (74LS157)
    
    
    
    New connections
    
    Print side     Signal     Connection between
    Solder         A7         IC44, pin 9  (74LS157) --  IC61, pin 9  (4164)
    Solder         CAS        IC52, pin 9  (74LS32)  --  IC61, pin15  (4164)
    
    
    Connecting the expansion board
    
     Pin    Wire color   Signal   I.C.   Type   Pin
    -------------------------------------------------
      1.    brown	     R/Cn     (IC44, LS157, p1 )
      2.    red	     O0	      (IC18, LS259, p4 )
      3.    orange	     O1	      (IC18, LS259, p5 )
      4.    yellow	     O2	      (IC18, LS259, p6 )
      5.    green	     A7mem    (IC53, xx256, p9 )
      6.    blue	     A7org    (IC35,   Z80, p37)
      7.    violet	     A8       (IC53, xx256, p1 )
      8.    grey	     A15      (IC44, LS157, p11)
      9.    white	     RFRn     (IC35,   Z80, p28)
     10.    black	     MRQn     (Molex pin 1=R/Cn)
    
    
    On the expansion board are a ten-pin and two two-pin Molex connectors to make the connections to the computer board (see appendix 2).
    A suitable place to mount the expansion board is front left on the plastic frame in the Bondwell 12. The list below describes
    the connections to be made from the ten-pin Molex connector to the Bondwell 12 computer board.
    
    
    Furthermore, the 5V supply voltage must be connected to the two-pin Molex connector intended for this. If desired, a LED can be connected
    to the remaining two-pin Molex connector.
    
    
    M.J. Moene
    Linnaeusparkweg 46-3
    1098 EC Amsterdam
    Tel .: 020-936378 (preferably between 19:00 and 20:00)
    
    
    Note 1:
        VDISK.COM up to and including version 1.5 Programs that directly call the memory disk BIOS routines read or write, one whose
        stack pointer has a value less than $ 8000, will crash. This is because the "bank" routine after switching from memory bank
        zero to one of the memory disk banks, retrieves the return address of the up-coming routine (read, write or getadr) from the
        wrong memory bank. This problem has been solved in VDISK version 1.6.
    
    Note 2:
        The memory space in which the routines for the virtual disk are placed is also used for: - routine that provides the first 'cold boot', - disk buffer when using Kaypro II and Osborne configuration for drive B :; at the same time applying the memory disk and the use of drive B: for Kaypro II or Osborne format is therefore not possible.
    
    
    List of abbreviations used:
    
    AL0, AL1: initial value for ALV (DPH table)
    ALV:      address of a buffer to keep track of disk occupancy (DPH)
    AND:      logical 'and' function
    ASCII:    American Standard Code for Information Interchange
    BDOS:     Basic Disk Operating System (CP / M)
    BIOS:     Basic Input / Output System (CP / M)
    BLM:      BLock Mask (DPB table)
    BSH:      Block SHIFT factor (DPB table)
    CAS:      Column Address Select (Dynamic RAM)
    CCP:      Console Command Processor (CP / M)
    CKS:      number of directory locations to be checked (DPB table)
    CPM:      Control Program for Microcomputers
    CSV:      Address of a buffer for checking the disk
    DIRBUF:   Directory Buffer (DPH table)
    DMA:      Direct Memory Access
    DPB:      Disk Parameter Block
    DRM:      maximum directory position number (0..DRM) (DPB table)
    DSM:      maximum data block number of a drive (0..DSM) (DPB table)
    EXM:      EXtent Mask (DPB table)
    HEF:      type cmos logic (Philips)
    LED:      Light Emitting Diode (memory disk activity indication)
    MRQ:      Memory ReQuest (microprocessor)
    MWA:      Monitor Work Area (CP / M system parameters)
    NOR:      Inverted logical 'or' function
    OFF:      number of reserved (system) tracks (DPB table)
    RAM:      Random Access Memory
    RAS:      Row Address Select (dynamic RAM)
    RFR:      ReFResh (memory-refresh, microprocessor)
    ROM:      Read Only Memory
    SPT:      Sectors Per Track (DPB table)
    TPA:      Transient Program Area (CP / M)
    THR:      THReshold (one-shot 555)
    XLT:      Sector translation table (DPH table)

    I also have a circuit that was was used for the TRS-80 for 256 Refresh rate.

    256_RFSH_sch.jpg



    Larry
    Last edited by ldkraemer; December 26, 2018, 07:41 AM. Reason: typo

    Leave a comment:


  • Ruud
    started a topic Looking for Z80 replacement

    Looking for Z80 replacement

    I have a Bondwell 14 and want to add more memory to it. The trick I use in the Commodore 64 and 128 is to replace the 4164s by 41256s. So the idea was to do the same here. But then I ran into this article by accident (sorry, Dutch only). It reminded me of a thing I completey forgot: the Z80 has only a 7 bits refresh register

    I remember once having read an article about a Z80 clone that had an 8 bits refresh register. The point is: I cannot remember the CPU mentioned. I checked some data sheets but, like NEC's uPD780, they also had a 7 bits refresh register.

    So my question: does it ring a bell and does any of you know this clone?

    If there isn't a replacement to be found, I either have to use the idea mentioned in the article or piggyback two sets of 4164s. Other ideas are welcome as well!

    Thank you in advance!
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