SwedaGuy
Experienced Member
I came across a rather obscure text document during a google search that indicated there were OpCodes in the 8085 processor that were unsupported and therefore undocumented in the Intel manuals. As some of you may know, I've been deeply involved in and 8085 assembly project for the last couple of years, so I am intrigued by the notion of secret goodies. Also, in an attempt to make my emulator as complete as possible, I would be interested in filling in some "blanks"
The following two instructions are pretty self explanatory, but what is the 'K' flag? How is it set/reset during processing? What event or events alter it? Also, it has to be bit 1, 3 or 5 (base 0) of the F register, but which one?
DDh JNK (Jump if 'K' Flag is NOT set)
FDh JK (Jump if 'K' Flag is set)
A few other oddballs:
08h DSUB (BC Pair is subtracted from HL Pair affecting all flags)
Sounds self-explanatory, but why are there no other double byte subs?
10h RRHL (Rotate Right HL Pair)
Why is there no instruction for rotating HL Left? Or rotating other pairs right? Or am I just missing these instructions somewhere? There are other vacant OpCode numbers available...
18h RLDE (Rotate Left DE Pair)
Same as above, why can DE only be rotated Left, and why are there no other instructions for rotating pairs left.
28h ADI HL (Add immediate an 8-bit value to HL Pair)
38h ADI SP (Add immediate an 8-bit value to Stack Pointer)
Don't need much help on these...unless someone has some juicy tidbits that aren't included in the description.
CBh RSTV (Does a RST 8 when the overflow flag is sent)
I'm assuming a Restart 8 is actually a Restart 7, and this was a typographical error on the part of the person who transcribed this originally.
EDh LHLX (Load HL pair with contents of address stored in DE pair)
D9h SHLX (Stores the HL pair contents to the address specified in DE pair)
These appear to be indirect references to addresses, in which case I am wondering if the bytes stored by SHLX are stored in reverse order as with the other double byte instructions. I'm assuming yes, but some clarification would be nice...
So...any Intel gurus out there that can get me further information? I'd like to make my emulator as complete as possible, but most of this is just for the curiosity value.
The following two instructions are pretty self explanatory, but what is the 'K' flag? How is it set/reset during processing? What event or events alter it? Also, it has to be bit 1, 3 or 5 (base 0) of the F register, but which one?
DDh JNK (Jump if 'K' Flag is NOT set)
FDh JK (Jump if 'K' Flag is set)
A few other oddballs:
08h DSUB (BC Pair is subtracted from HL Pair affecting all flags)
Sounds self-explanatory, but why are there no other double byte subs?
10h RRHL (Rotate Right HL Pair)
Why is there no instruction for rotating HL Left? Or rotating other pairs right? Or am I just missing these instructions somewhere? There are other vacant OpCode numbers available...
18h RLDE (Rotate Left DE Pair)
Same as above, why can DE only be rotated Left, and why are there no other instructions for rotating pairs left.
28h ADI HL (Add immediate an 8-bit value to HL Pair)
38h ADI SP (Add immediate an 8-bit value to Stack Pointer)
Don't need much help on these...unless someone has some juicy tidbits that aren't included in the description.
CBh RSTV (Does a RST 8 when the overflow flag is sent)
I'm assuming a Restart 8 is actually a Restart 7, and this was a typographical error on the part of the person who transcribed this originally.
EDh LHLX (Load HL pair with contents of address stored in DE pair)
D9h SHLX (Stores the HL pair contents to the address specified in DE pair)
These appear to be indirect references to addresses, in which case I am wondering if the bytes stored by SHLX are stored in reverse order as with the other double byte instructions. I'm assuming yes, but some clarification would be nice...
So...any Intel gurus out there that can get me further information? I'd like to make my emulator as complete as possible, but most of this is just for the curiosity value.