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XTIDE Universal BIOS v2.0.0 beta testing thread

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  • alecv
    replied
    XT IDE Universal BIOS bug?

    I've found an old XT-compatible computer with WD-1002 MFM controller and ST-225 HDD.
    HDD is formatted with MITAC ADM v1.0 and divided onto two partitions (10Mb+10Mb).
    The first partition is bootable but protected with ADM password (I do not know it).
    The second partition is open.

    After installing XUB (~589) with boot manager module (F2) I see a two "Foreign disk 80h".
    "Foreign disk 81h' and my IDE drive as 82h.

    IDE drive is bootable (with XUB boot manager), I can see my IDE as C: (80h) and second MFM partition as D: (82h)

    Unfortunately, first MFM bartition becames not bootable after XT IDE installation.

    Leave a comment:


  • Trixter
    replied
    Okay, full test results follow. The new M24/6300 code is definitely a small improvement, and running the NEC code on an NEC V30 is an additional improvement.

    XUB 1.1.5, compat mode, 8086:

    Code:
    Write Speed         : 77.05 KB/s
    Read Speed          : 91.04 KB/s
    8K random, 70% read : 9.7 IOPS
    Sector random read  : 59.0 IOPS
    
    Average access time (includes latency and file system overhead), is 17 ms.
    I then flashed it to XUB 2.0.0 b3 (r602) IDE_XT (808x code) and moved jumpers to high-speed/chuckmod mode:

    Code:
    Configuration: 4 MiB test file, 256 IOs in random tests.
    
    Write Speed         : 84.26 KB/s
    Read Speed          : 102.71 KB/s
    8K random, 70% read : 10.6 IOPS
    Sector random read  : 57.5 IOPS
    
    Average access time (includes latency and file system overhead), is 17 ms.
    I then replaced the 8086 with an NEC V20:

    Code:
    Write Speed         : 87.52 KB/s
    Read Speed          : 103.72 KB/s
    8K random, 70% read : 10.8 IOPS
    Sector random read  : 63.8 IOPS
    
    Average access time (includes latency and file system overhead), is 16 ms.
    Finally, I reflashed with IDE_XTP to get the NEC V20 code:

    Code:
    Write Speed         : 106.83 KB/s
    Read Speed          : 142.57 KB/s
    8K random, 70% read : 14.0 IOPS
    Sector random read  : 69.6 IOPS
    
    Average access time (includes latency and file system overhead), is 14 ms.
    Looking solely at read speeds, the improvements were:

    1.1.5 to 2.0.0b3: 12% faster (this is what Krille originally wanted to know)
    2.0.0b3 8086 code to 2.0.0b3 NEC code: 38% faster

    Hope this helps! I broke a 6300 doing this so I'll start a new thread for that one

    Leave a comment:


  • Trixter
    replied
    Whoops, my bad! I was so ingrained with "must not attempt adjacent register reads on M24" that I confused myself into keeping it in compat mode. I'll switch the jumpers tonight and retest.

    Leave a comment:


  • Malc
    replied
    Set J1/J2 jumpers to Hi speed mode, See post #488, When using CF originally setup with XUB 1.1.5 and you later re-flash with a recent revision of the XUB (New drive translation code) you will likely have to wipe / partition / format and reinstall, Likewise if you setup the CF card using a recent revision of the XUB and then go back to XUB 1.1.5 you will likely have to wipe and setup again.

    Originally posted by Trixter View Post
    So I finally got around to testing this, and did some benchmarks with a 4GB CF card using the 1.1.5 BIOS already on the glitchworks v4 card, and aside from not being able to boot directly off the CF card, it went well. The 1.1.5 BIOS displayed drives 80 and 81 in a menu (there's an MFM drive in the system) and booting from 80 or A: worked, and I could fdisk/format and run disktest and everything checked out. I figured not being able to boot off the CF card was due to LBA support in 1.1.5 so I didn't worry about it at the time.

    Then I flashed r602 (from the 6300 itself) and now, on bootup, the v4 card can't see the CF card at all. Both Master and Slave (at 300h) show "not found". I was careful to load IDE_XT.BIN and change the card type to 6300/Olivetti M24, and not much else, and the flash appeared to be successful. Both J1/J2 jumpers on my board are set to compatibility mode (as opposed to hi-speed/chuckmod mode).

    What am I missing? The card isn't bricked; the BIOS starts up fine, it just doesn't think there's anything on Master (when the 1.1.5 BIOS could see it just fine).

    Also, I never saw a menu for picking the boot hard drive; was that removed between 1.1.5 and 2.0.0 b3, or did I miss another setting?

    Leave a comment:


  • Trixter
    replied
    Originally posted by Trixter View Post
    Received my v4 XT-IDE with slot-8 mod, however I'm in the middle of a project where I have 5160s and a Tandy 1000 set up and exploded all over the place. Once that's done, I'll set up a 6300 and get to testing.
    So I finally got around to testing this, and did some benchmarks with a 4GB CF card using the 1.1.5 BIOS already on the glitchworks v4 card, and aside from not being able to boot directly off the CF card, it went well. The 1.1.5 BIOS displayed drives 80 and 81 in a menu (there's an MFM drive in the system) and booting from 80 or A: worked, and I could fdisk/format and run disktest and everything checked out. I figured not being able to boot off the CF card was due to LBA support in 1.1.5 so I didn't worry about it at the time.

    Then I flashed r602 (from the 6300 itself) and now, on bootup, the v4 card can't see the CF card at all. Both Master and Slave (at 300h) show "not found". I was careful to load IDE_XT.BIN and change the card type to 6300/Olivetti M24, and not much else, and the flash appeared to be successful. Both J1/J2 jumpers on my board are set to compatibility mode (as opposed to hi-speed/chuckmod mode).

    What am I missing? The card isn't bricked; the BIOS starts up fine, it just doesn't think there's anything on Master (when the 1.1.5 BIOS could see it just fine).

    Also, I never saw a menu for picking the boot hard drive; was that removed between 1.1.5 and 2.0.0 b3, or did I miss another setting?

    Leave a comment:


  • hwarin
    replied
    Thanks, Jo22 for your interest on my issue.

    It's known that some CF devices won't work, but the issue was not about the flash device as it was tested successfully.

    Here's the entire story : http://www.vcfed.org/forum/showthrea...478#post568478


    Regards - Hervé

    Leave a comment:


  • Jo22
    replied
    Hi, just saw this thread, thought I should stop by for a moment and say that I really appreciate all the hard work to improve XTIDE Universal BIOS!
    Speaking of the Janus issue, maybe some other flash device could help ? The DiskOnChip devices (DoC 2000 series) had their own boot-code.
    Maybe they work with the Janus software or can provide some hints during debugging. Anyway, it's just an idea. I've got no Amiga for testing, sadly.

    Leave a comment:


  • toms01
    replied
    Hi Hervé,

    yes, excellent observation. I repeat, we need a Early-INT13?-initialization in the XTIDE-BIOS (like Seagate-ST01/02 or WD-Controller).

    Leave a comment:


  • hwarin
    replied
    Hi, friends

    I've run some intensive tests with my patched "LateInitialization" BIOS and I must conclude to a (complete ?) failure, as expected by Toms01.

    1) Confirmed the fact that XT-CF Rev2 and IDE-XT bios "LateInitialization" is capable to work in the sidecar - That's a good starting point BUT insuficient for "Janus" (sidecar or BridgeBoard flaviour) complete operation
    2) Confirmed the fact that Janus does not work with XT-IDE bios due to initialization sequence of XT-IDE bios

    So far, I'm nearly at the same point as 5 years ago, but, thanks to WallyB's support, and Toms01 intervention, and Malc for providing r601 VeryLateInit build, I'm absolutely certain that we'll can make it work in near future. My current issue is (as it was 5 years ago), in the setup of the entire toolchain as I've never practiced all those modern Tools - my 8086 code skill is absolutely 99% rusty and weak but I should be able to fix if I had the tooling.

    What is "Janus" ? Janus is the "special" board with 128Kb of dual ported RAM that makes "the link" between Amiga world and PC compatible world. For PC world, it's a sort of expansion BIOS (located at E000:0 for XTs - dual port RAM) loaded by Amiga side to PC side at it's boot time. From Amiga terms, it's called "Janus handler"

    What I've observed :
    1) With a regular WD1002 controler, Janus operation is correct
    If I trace INTs from DOS 3.20

    INT13 => 70xxx (DOS)
    From DOS : Call far 70:[18CA]=>E000:0272 (we're going to Janus now)
    From Janus : Call far E000:[21DC]=>C800:0286 (we're going to WD1002 now) Notice, E000xxx is RAM, not ROM !
    From WD1002 : INT40 => F000:EC59 (we're going to BIOS) As expected, this is ROM so, it uses an INT.

    INT19 => 70:2030 (DOS)
    From DOS
    - Restore INT13 to E000:0271 (Janus)
    - Restore INT19 to ???? (forgot to record ! To be tracked down)
    - Does INT19


    2) With XT-CF Rev2 patched VeryLateInit (the only one giving an IDE-XT sign of live in the sidecar), Janus does not work at all
    If I trace INTs from DOS 3.20

    INT13 => 70:0F97 (DOS)
    From DOS : Call far 70:[18CA]=>C800:185C (we're going to IDE-XT now and Janus was bypassed)
    From XT-IDE : Call far 30:[0000]=>F000:EC59 (we're going directly to BIOS)

    INT19 => 70:2030 (DOS)
    From DOS
    - Restore INT13 to C800:185C (IDE-XT)
    - Restore INT19 to C800:11eC (IDE-XT)
    - Does INT19

    =*=*==*=*=*=*=

    From my understanding, XT-CF should
    - Hook INT13 and INT19 at expansion ROM initialization time (C800:3)
    - Restore INT13 and INT19 when it's INT19 is raised, then, cascade INT19 [or attempt to boot as does WD1002 from C800:026D ??]
    - Cascade INT13 to "previous owner" if request doesn't regards it's own HDD

    So far, I've not found where, in the code, all this is performed

    ==> If a programmer could help, I (and the very small Amiga+(Sidecar|BridgeBoard) communauty users)) would greately appreciate efforts to support their future, when all MFM will die.
    ==> At worst, an working image of the entire tool chain may be of help and would avoid me to waste a long time to try to build the necessary setup.

    Regards - Hervé

    Leave a comment:


  • WallyB
    replied
    Originally posted by hwarin View Post
    Hi, all

    I want to thank specially WallyB, Toms01, and Malc for their support on my issue. I was stuck since nearly 5 years on this, and it now starts to work.

    ==> Now, I need to run extensive tests to confirm the complete fix with this workaround.


    From Malc's binary, I've applyed Toms01's recommendations : Patch Int13hBiosInit_Handler [10F7]
    [1105] was 75:0A (JNZ +0A) replaced by 90:90 (NOP NOP)
    [1FFF] Checksum updated to F8 (Don't know if it was mandatory)


    [ATTACH=CONFIG]52065[/ATTACH][ATTACH=CONFIG]52066[/ATTACH][ATTACH=CONFIG]52067[/ATTACH][ATTACH]52068[/ATTACH]

    Regards - Hervé
    Congratulations Hwarin. After 5 year wait, it must feel Great.
    I will try this myself, since I've never seen that Boot Menu on my Lo-Tech (looks handy). I believe I have R567-Late-Init on mine.

    Leave a comment:


  • hwarin
    replied
    Hi, all

    I want to thank specially WallyB, Toms01, and Malc for their support on my issue. I was stuck since nearly 5 years on this, and it now starts to work.

    ==> Now, I need to run extensive tests to confirm the complete fix with this workaround.


    From Malc's binary, I've applyed Toms01's recommendations : Patch Int13hBiosInit_Handler [10F7]
    [1105] was 75:0A (JNZ +0A) replaced by 90:90 (NOP NOP)
    [1FFF] Checksum updated to F8 (Don't know if it was mandatory)


    A1060_boot_1.jpgA1060_boot_2.jpgA1060_boot_3.jpgPatched.zip

    Regards - Hervé

    Leave a comment:


  • hwarin
    replied
    Thanks, Malc

    I will try with this binary tonight and will report on success or Failure. The sidecar is only a small 8088; I won't use XTP version.

    Regards - Hervé

    Leave a comment:


  • Malc
    replied
    Originally posted by hwarin View Post
    That was too late, SST was bricked and the M24 was not booting anymore, even from floppy. The EPROM programmer was the only solution to recover/erase it as I couldn't reach JP1 with the M24 powered on.
    I assume you have the Lo-tech ISA - CF adapter then, I thought you had the XT-IDE R2

    I will for sure test this device type on the M24.
    Scratch that, You will need to Configure the XUB for "XT-CF PIO8" or "XT-CF PIO8 (BIU Offload)" for the Lo-tech adapter

    Definitly, yes,
    I have attached 2 x 8k binaries in 1 ZIP, IDE_XT.BIN and IDE_XTP BIN, Both have the BOOT Menu and include Module_Very_Late_Init, Use the XTP for V20/30 cpu or the other for 8088.



    I'm no programmer so i'll leave the "Int13hBiosInit_Handler:" Question for someone else.
    Attached Files

    Leave a comment:


  • toms01
    replied
    Hi,
    my posts are moderated (my post-count seems not high enough), therefore my answers are not visible instantly...
    I started a thread in the a1k.org-forum with this modified bios. Is it possible to send me your Email-Address, i can send you the zip-archive with it.
    Thomas

    Leave a comment:


  • hwarin
    replied
    Originally posted by Malc View Post
    You MUST use XTIDECFG.COM to configure the XUB and Save then Flash..
    Seen that, it was my mistake ! (Possibly, documentations on flashing SST might be a bit unsufficiently clear for the absolute hurry beginner that I was at the moment)

    Originally posted by Malc View Post
    Nope!, Use XTIDECFG.COM as above, It will do the checksum.
    That was too late, SST was bricked and the M24 was not booting anymore, even from floppy. The EPROM programmer was the only solution to recover/erase it as I couldn't reach JP1 with the M24 powered on.


    Originally posted by Malc View Post
    Configure the XUB for "XTIDE rev 2 (Olivetti M24)" device type,
    I will for sure test this device type on the M24.

    Originally posted by Malc View Post
    The L in IDE_XTL stands for LARGE, The official r601 binaries do not have the "Very_late_init" module included, Are you saying you want a bios with it included ?
    Definitly, yes, I need to figure out what's going on with the sidecar (A1060), even if I Don't think that it'll help to solve the issue.
    - I must try that before going to tweak binaries (see Toms01's post with "jne SHORT .VeryLateInitFailed ; XTIDE Universal BIOS does not work. <<<<==== Fails here")
    - If you also could precise me where I'll can find the entry for label "Int13hBiosInit_Handler:" in this binary would save me lots on time.

    If this was starting to work, it would be a major improvement as I would be able to reach XT-IDE's initialization step and have first testings !

    Thanks for your help - Hervé

    Leave a comment:

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