ldkraemer
Veteran Member
I know the HP Logic Pulser, Current Tracer, and Logic Probe, of the late 1970's era was the best Logic Pulser of that time period.
But, with all the technology breakthroughs over the years, what's the best buy in Logic Pulsers today?
REF: 1979 Document
The widespread use of digital integrated circuits presents a host of new
challenges to electronic troubleshooters. Techniques for finding failures
in analog circuits are well understood but not very useful in the digital
world. There has also been a scarcity of instrumentation specifically
designed for testing digital circuits.
Stimulus/response techniques, a mainstay of analog troubleshooting,
illustrate the problem. A small signal is inserted at a circuit node and
the response is monitored at various points downstream. The point at which
the signal disappears or becomes distorted gives a good indication of the
fault location.
Applying stimulus/response techniques to digital circuits has, up to now,
been impractical. Digital outputs are intentionally designed with low output
impedances to make them insensitive to noise. In a complete system every
input is connected to a low impedance output, which clamps it in either a high
or low logic state. The only method of injecting arbitrary pulses into a given
IC input has been to unsolder the output driving it or to cut the printed
circuit trace leading to it. No convenient non-destructive means of providing
arbitrary in-circuit stimulus to IC's on digital boards has existed.
Now, two new instruments make stimulus/response testing of digital circuits not
only possible but easy. Model 10526T Logic Pulser automatically injects a pulse
of the proper polarity anywhere in a TTL or DTL circuit. Model 10525T Logic
Probe detects logic levels and pulses, like its predecessor, the 10525A Logic
Probe. In addition, the new Probe can distinguish bad levels and open circuits.
It also incorporates improvements in speed, input impedance, reliability, and
input protection.
The logic pulser is a new development in digital instrumentation. It will
superimpose digital pulses onto circuit nodes with no need to unsolder pins or
cut printed-circuit traces even when the nodes are being clamped by digital outputs.
The Logic Pulser is a single-shot, high current pulse generator packaged in a
hand-held probe. It can source sufficient current to force low outputs out of
saturation to a high state and sink sufficient current to pull normally high
outputs below the logic zero threshold.
Actuation is by means of a pushbutton switch on the probe body. When the switch
is pressed, a single high-going or low-going pulse approximately 0.3us wide is
delivered to the circuit under test. Pulse polarity selection is automatic-high
nodes are pulsed low and low nodes are pulsed high each time the button is
pressed. When not pulsing, the output tip of the Pulser is in a high-impedance
third state so that circuit operation is not affected by probing.
Driving a TTL/DTL output out of saturation requires high current, but the
short duration of the pulse, coupled with the low pulse repetition rate
of manual actuation, limits the average power dissipation to minuscule
amounts and assures that the driven device is protected,
Probe Measures Response
The Logic Pulser provides the signal injection necessary for stimulus/response
troubleshooting.
The system's response to the pulser-applied signals is monitored with the
Model 10525T Logic Probe.
This new TTL/DTL Probe is designed for detecting and indicating logic signals
in digital systems. It detects valid high and low logic levels, open circuits
and voltages in the bad-level region between the logic thresholds, pulses down
to 1Ons in width, and pulse trains to greater than 50 MHz. All information is
displayed by a single indicator light in the probe tip.
The Probe is simple to use. With the probe tip open-circuited the display lamp
will be at half brilliance, indicating a bad level or an open circuit. When
touched to a circuit point where there is a steady logic level, the lamp goes
to full brilliance for a logic high or extinguishes to indicate a logic low.
If the probed node is at an invalid level-for example, an open TTL input-the
lamp remains at half brilliance.
The Probe is particularly valuable for monitoring single-shot or repetitive
pulses. Pulse trains to greater than 50 MHz are indicated by a flashing light.
Single pulses, virtually impossible to view with conventional oscilloscopes,
are captured by the Probe and stretched for a clearly visible blink of the lamp.
The lamp flashes on for high-going pulses and blinks off for low-going pulses.
The Probe's response to various input signals is summarized in Fig. 2.
Using the Logic Probe won't affect the circuit under test because its input
impedance is greater than 25 KOHM at either logic level. Its input
characteristics are similar to one low-power TTL load.
Inadvertent probing of high-voltage points won't damage the Probe. Its input
is protected against overloads to +-70 volts continuous and +-200 volts
intermittent. The Probe may even be touched to the 120-volt ac power line
for 30 seconds; it will respond with a blinking light to indicate the 50 or
60 HZ line frequency.
Troubleshooting Methods
There are probably as many ways to use the Logic Probe and Pulser as there are
users. In one method, the Probe is used first to detect the absence of key
signals such as clock, start, shift, reset, or enable. This isolates the
failure to a small group of IC's. With a rough idea of the location of the
failure, the internal clock is removed and the Pulser is used to supply
stimuli to individual packages. Gate operation is verified by pulsing inputs
and checking for transmitted pulses at the output. Flip-Flops are checked for
proper responses to stimuli applied at the clock and preset inputs. A decade
or binary counter can be checked with the Pulser applying count pulses and the
Probe monitoring the progression of output states. With Pulser and Probe
providing stimulus and response, the truth tables of suspected packages are
easily checked.
When a failure is located, Probe and Pulser can be used on the same node
to aid in its identification. A Probe display of a steady logic low when
the Pulser is driving the node indicates a short to ground. The situation
is analogous for a short to Vcc.
Another troubleshooting technique uses the Pulser to aid in preliminary
fault isolation. A long series of logic circuits can be checked by pulsing
one end and monitoring effects far down the chain. If the pulse is not
properly transmitted, the same technique can be used on each half of the
chain. Continued iterations will isolate the failure.
For example, the count and display circuitry of a digital counter can be
checked using this technique (see Fig. 3). Reset the counter and pulse the
clock input of one of the IC's in the counting chain one or more times.
After the clock input of the display latch is pulsed, the corresponding
display digit should read the number of pulses applied to the IC counting
decade. If the proper number isn't displayed, the Probe and Pulser are
used to isolate the failure to the decade, latch, decoder or display.
A correct display reading indicates the problem is somewhere else.
The new bad-level/open-circuit detection capability of the Logic Probe
lends itself to checking TTL systems that have three-state outputs. The
three state output can be in a logic high or logic low state like a
conventional TTL output, or it can be in a high-impedance third state,
unable to sink or source any current. The Probe will detect this third
state and indicate it as an open circuit. Bad-level/open-circuit detection
is also useful for locating failures due to broken bonds, which are
responsible for a high percentage of IC failures. When a bond breaks on
an output pin it leaves the input of the IC connected to it open-circuited.
The input will float to approximately 1.4 V and the Probe will respond
with a bad-level indication.
Use with Clip and Comparator
The Logic Pulser also complements the 10528A Logic Clip and 10529A Logic
Comparator. The Clip attaches to 14 and 16-pin dual-in-line packages
and simultaneously indicates the states of all pins. Used with the Pulser,
the Clip is handy when responses at several output pins are of interest.
The Comparator is a fault isolation device that compares a known-good
reference IC with a test IC of the same type. When testing sequential logic,
the test and reference IC's must be synchronized to the same state before
the comparison is made. When reset pulses are not provided, the Logic
Pulser will provide the necessary synchronization pulse.
Logic Probe Design
Most of the circuitry in the Logic Probe is in a single custom bipolar
integrated circuit-the main reason that everything fits into the Probe's
one-fourth-cubic-inch internal volume. The Probe's features lend themselves
very nicely to integrated circuit technology. For instance, the Probe must
respond quickly to the beginning of a pulse but it doesn't have to respond
immediately to the end of the pulse because the indication is being stretched
much longer than the pulse duration anyway. Because of this no special IC
processing techniques had to be used. In fact, the stretching inherent in
transistors which are slow to turn off is an advantage.
The Probe block diagram is shown in Fig.4. There are two channels, one for
detecting high logic levels and one for detecting low levels. The two
channels are similar, so only the logic-high channel will be described.
In the absence of a valid logic high at the input, the output of the
threshold detector is low and the set input of FF1 is high. Feedback from
the output of FF1 to the reset input results in the output being low and
Q2 being off. When a valid logic high occurs the threshold detector goes
high and sets FF1, provided that Gate G1 is enabled by G2. G2 disables G1
if the logic low channel is stretching a pulse and if it senses a valid
logic low level. When the output of FF1 goes high, the output is delayed
and inverted by G3, G4, and C1 and applied to the reset input to reset the
flip-flop at the end of the stretching period. The set input of FF1 overrides
the reset input in the case of a steady logic high level to keep Q2 on as
long as the level is present. In the absence of either a logic high or a
logic low, Gate G9 will turn Q1 on to indicate a bad level. Diode D1 reduces
the voltage drop across the lamp when Q1 is on, resulting in a dim indication
for bad-level/open-circuit conditions.
Pulser Design
The Logic Pulser has the apparent ability to distinguish between high and low
levels and always pulse with the proper polarity. Here's how it works.
When the switch is actuated the output is clamped low for 0.3 us and then
driven high for 0.3 us. If the driven node is at a logic low level, nothing
happens when the Pulser output clamps low, and a single positive pulse is
delivered when the Pulser output goes high. If the driven node is originally
in the high stale the reverse is true.
Fig. 5 is a block diagram of the Pulser circuitry. Signals from the pulse
button are first shaped by an RS flip-flop. The single pulse from the
flip-flop is shortened to 0.3 us by a one-shot multivibrator and applied
to the low-level amplifier. The output is clamped low for the duration of
the pulse. The trailing edge of the pulse triggers a second one-shot
multivibrator and a second 0.3 us pulse is generated. The second pulse
is applied to the high-level amplifier which holds the output high for
0.3 us.
After the trailing edge of the positive output pulse, 0.6 us following switch
closure, both output amplifiers are off. In this state the impedance seen
looking back into the Pulser's output is greater than 1 MOHM for logic-level
signals.
When driving a low node out of saturation, the Pulser can source at least
650 mA. The necessary charge is capacitively stored in the Pulser, which
never draws more than 25 mA.
Acknowledgments
Our thanks are extended to Chuck Taubman and Gary Gordon for guidance and
support throughout the development. Jesse Pipkin and Howard Marshall
contributed to the basic idea behind the Pulser. Alex Au provided
considerable assistance with the Probe IC design. Jim Marrocco and David
Goelz ably handled mechanical and industrial design. Roy Criswell introduced
both instruments to production.
SPECIFICATIONS
HP Model 10526T
Logic Pulser
OUTPUT HIGH PULSE VOLTAGE: > 2 V at 0.65 A
(1A typical at Vps = 5 V, 25C)
OUTPUT LOW PULSE VOLTAGE; <0.8 V at 0.65 A
(1A typical at Vps = 5 V. 25C).
OUTPUT IMPEDANCE (active state): <2 ohms
OUTPUT IMPEDANCE (off state): > 1 Megohm.
PULSE WIDTH; 0.3 us nominal
INPUT OVERLOAD PROTECTION: +-50 volts continuous
POWER SUPPLY INPUT PROTECTION: +-7 volts
(Includes power lead reversal protection)
POWER REQUIREMENTS: 5 V +- 10% at 25 mA
TEMPERATURE. OC to 55C.
ACCESSORIES INCLUDED: BNC to alligator clips, ground clip
PRICE IN USA:
Model 10526T, $95.00
Larry
But, with all the technology breakthroughs over the years, what's the best buy in Logic Pulsers today?
REF: 1979 Document
The widespread use of digital integrated circuits presents a host of new
challenges to electronic troubleshooters. Techniques for finding failures
in analog circuits are well understood but not very useful in the digital
world. There has also been a scarcity of instrumentation specifically
designed for testing digital circuits.
Stimulus/response techniques, a mainstay of analog troubleshooting,
illustrate the problem. A small signal is inserted at a circuit node and
the response is monitored at various points downstream. The point at which
the signal disappears or becomes distorted gives a good indication of the
fault location.
Applying stimulus/response techniques to digital circuits has, up to now,
been impractical. Digital outputs are intentionally designed with low output
impedances to make them insensitive to noise. In a complete system every
input is connected to a low impedance output, which clamps it in either a high
or low logic state. The only method of injecting arbitrary pulses into a given
IC input has been to unsolder the output driving it or to cut the printed
circuit trace leading to it. No convenient non-destructive means of providing
arbitrary in-circuit stimulus to IC's on digital boards has existed.
Now, two new instruments make stimulus/response testing of digital circuits not
only possible but easy. Model 10526T Logic Pulser automatically injects a pulse
of the proper polarity anywhere in a TTL or DTL circuit. Model 10525T Logic
Probe detects logic levels and pulses, like its predecessor, the 10525A Logic
Probe. In addition, the new Probe can distinguish bad levels and open circuits.
It also incorporates improvements in speed, input impedance, reliability, and
input protection.
The logic pulser is a new development in digital instrumentation. It will
superimpose digital pulses onto circuit nodes with no need to unsolder pins or
cut printed-circuit traces even when the nodes are being clamped by digital outputs.
The Logic Pulser is a single-shot, high current pulse generator packaged in a
hand-held probe. It can source sufficient current to force low outputs out of
saturation to a high state and sink sufficient current to pull normally high
outputs below the logic zero threshold.
Actuation is by means of a pushbutton switch on the probe body. When the switch
is pressed, a single high-going or low-going pulse approximately 0.3us wide is
delivered to the circuit under test. Pulse polarity selection is automatic-high
nodes are pulsed low and low nodes are pulsed high each time the button is
pressed. When not pulsing, the output tip of the Pulser is in a high-impedance
third state so that circuit operation is not affected by probing.
Driving a TTL/DTL output out of saturation requires high current, but the
short duration of the pulse, coupled with the low pulse repetition rate
of manual actuation, limits the average power dissipation to minuscule
amounts and assures that the driven device is protected,
Probe Measures Response
The Logic Pulser provides the signal injection necessary for stimulus/response
troubleshooting.
The system's response to the pulser-applied signals is monitored with the
Model 10525T Logic Probe.
This new TTL/DTL Probe is designed for detecting and indicating logic signals
in digital systems. It detects valid high and low logic levels, open circuits
and voltages in the bad-level region between the logic thresholds, pulses down
to 1Ons in width, and pulse trains to greater than 50 MHz. All information is
displayed by a single indicator light in the probe tip.
The Probe is simple to use. With the probe tip open-circuited the display lamp
will be at half brilliance, indicating a bad level or an open circuit. When
touched to a circuit point where there is a steady logic level, the lamp goes
to full brilliance for a logic high or extinguishes to indicate a logic low.
If the probed node is at an invalid level-for example, an open TTL input-the
lamp remains at half brilliance.
The Probe is particularly valuable for monitoring single-shot or repetitive
pulses. Pulse trains to greater than 50 MHz are indicated by a flashing light.
Single pulses, virtually impossible to view with conventional oscilloscopes,
are captured by the Probe and stretched for a clearly visible blink of the lamp.
The lamp flashes on for high-going pulses and blinks off for low-going pulses.
The Probe's response to various input signals is summarized in Fig. 2.
Using the Logic Probe won't affect the circuit under test because its input
impedance is greater than 25 KOHM at either logic level. Its input
characteristics are similar to one low-power TTL load.
Inadvertent probing of high-voltage points won't damage the Probe. Its input
is protected against overloads to +-70 volts continuous and +-200 volts
intermittent. The Probe may even be touched to the 120-volt ac power line
for 30 seconds; it will respond with a blinking light to indicate the 50 or
60 HZ line frequency.
Troubleshooting Methods
There are probably as many ways to use the Logic Probe and Pulser as there are
users. In one method, the Probe is used first to detect the absence of key
signals such as clock, start, shift, reset, or enable. This isolates the
failure to a small group of IC's. With a rough idea of the location of the
failure, the internal clock is removed and the Pulser is used to supply
stimuli to individual packages. Gate operation is verified by pulsing inputs
and checking for transmitted pulses at the output. Flip-Flops are checked for
proper responses to stimuli applied at the clock and preset inputs. A decade
or binary counter can be checked with the Pulser applying count pulses and the
Probe monitoring the progression of output states. With Pulser and Probe
providing stimulus and response, the truth tables of suspected packages are
easily checked.
When a failure is located, Probe and Pulser can be used on the same node
to aid in its identification. A Probe display of a steady logic low when
the Pulser is driving the node indicates a short to ground. The situation
is analogous for a short to Vcc.
Another troubleshooting technique uses the Pulser to aid in preliminary
fault isolation. A long series of logic circuits can be checked by pulsing
one end and monitoring effects far down the chain. If the pulse is not
properly transmitted, the same technique can be used on each half of the
chain. Continued iterations will isolate the failure.
For example, the count and display circuitry of a digital counter can be
checked using this technique (see Fig. 3). Reset the counter and pulse the
clock input of one of the IC's in the counting chain one or more times.
After the clock input of the display latch is pulsed, the corresponding
display digit should read the number of pulses applied to the IC counting
decade. If the proper number isn't displayed, the Probe and Pulser are
used to isolate the failure to the decade, latch, decoder or display.
A correct display reading indicates the problem is somewhere else.
The new bad-level/open-circuit detection capability of the Logic Probe
lends itself to checking TTL systems that have three-state outputs. The
three state output can be in a logic high or logic low state like a
conventional TTL output, or it can be in a high-impedance third state,
unable to sink or source any current. The Probe will detect this third
state and indicate it as an open circuit. Bad-level/open-circuit detection
is also useful for locating failures due to broken bonds, which are
responsible for a high percentage of IC failures. When a bond breaks on
an output pin it leaves the input of the IC connected to it open-circuited.
The input will float to approximately 1.4 V and the Probe will respond
with a bad-level indication.
Use with Clip and Comparator
The Logic Pulser also complements the 10528A Logic Clip and 10529A Logic
Comparator. The Clip attaches to 14 and 16-pin dual-in-line packages
and simultaneously indicates the states of all pins. Used with the Pulser,
the Clip is handy when responses at several output pins are of interest.
The Comparator is a fault isolation device that compares a known-good
reference IC with a test IC of the same type. When testing sequential logic,
the test and reference IC's must be synchronized to the same state before
the comparison is made. When reset pulses are not provided, the Logic
Pulser will provide the necessary synchronization pulse.
Logic Probe Design
Most of the circuitry in the Logic Probe is in a single custom bipolar
integrated circuit-the main reason that everything fits into the Probe's
one-fourth-cubic-inch internal volume. The Probe's features lend themselves
very nicely to integrated circuit technology. For instance, the Probe must
respond quickly to the beginning of a pulse but it doesn't have to respond
immediately to the end of the pulse because the indication is being stretched
much longer than the pulse duration anyway. Because of this no special IC
processing techniques had to be used. In fact, the stretching inherent in
transistors which are slow to turn off is an advantage.
The Probe block diagram is shown in Fig.4. There are two channels, one for
detecting high logic levels and one for detecting low levels. The two
channels are similar, so only the logic-high channel will be described.
In the absence of a valid logic high at the input, the output of the
threshold detector is low and the set input of FF1 is high. Feedback from
the output of FF1 to the reset input results in the output being low and
Q2 being off. When a valid logic high occurs the threshold detector goes
high and sets FF1, provided that Gate G1 is enabled by G2. G2 disables G1
if the logic low channel is stretching a pulse and if it senses a valid
logic low level. When the output of FF1 goes high, the output is delayed
and inverted by G3, G4, and C1 and applied to the reset input to reset the
flip-flop at the end of the stretching period. The set input of FF1 overrides
the reset input in the case of a steady logic high level to keep Q2 on as
long as the level is present. In the absence of either a logic high or a
logic low, Gate G9 will turn Q1 on to indicate a bad level. Diode D1 reduces
the voltage drop across the lamp when Q1 is on, resulting in a dim indication
for bad-level/open-circuit conditions.
Pulser Design
The Logic Pulser has the apparent ability to distinguish between high and low
levels and always pulse with the proper polarity. Here's how it works.
When the switch is actuated the output is clamped low for 0.3 us and then
driven high for 0.3 us. If the driven node is at a logic low level, nothing
happens when the Pulser output clamps low, and a single positive pulse is
delivered when the Pulser output goes high. If the driven node is originally
in the high stale the reverse is true.
Fig. 5 is a block diagram of the Pulser circuitry. Signals from the pulse
button are first shaped by an RS flip-flop. The single pulse from the
flip-flop is shortened to 0.3 us by a one-shot multivibrator and applied
to the low-level amplifier. The output is clamped low for the duration of
the pulse. The trailing edge of the pulse triggers a second one-shot
multivibrator and a second 0.3 us pulse is generated. The second pulse
is applied to the high-level amplifier which holds the output high for
0.3 us.
After the trailing edge of the positive output pulse, 0.6 us following switch
closure, both output amplifiers are off. In this state the impedance seen
looking back into the Pulser's output is greater than 1 MOHM for logic-level
signals.
When driving a low node out of saturation, the Pulser can source at least
650 mA. The necessary charge is capacitively stored in the Pulser, which
never draws more than 25 mA.
Acknowledgments
Our thanks are extended to Chuck Taubman and Gary Gordon for guidance and
support throughout the development. Jesse Pipkin and Howard Marshall
contributed to the basic idea behind the Pulser. Alex Au provided
considerable assistance with the Probe IC design. Jim Marrocco and David
Goelz ably handled mechanical and industrial design. Roy Criswell introduced
both instruments to production.
SPECIFICATIONS
HP Model 10526T
Logic Pulser
OUTPUT HIGH PULSE VOLTAGE: > 2 V at 0.65 A
(1A typical at Vps = 5 V, 25C)
OUTPUT LOW PULSE VOLTAGE; <0.8 V at 0.65 A
(1A typical at Vps = 5 V. 25C).
OUTPUT IMPEDANCE (active state): <2 ohms
OUTPUT IMPEDANCE (off state): > 1 Megohm.
PULSE WIDTH; 0.3 us nominal
INPUT OVERLOAD PROTECTION: +-50 volts continuous
POWER SUPPLY INPUT PROTECTION: +-7 volts
(Includes power lead reversal protection)
POWER REQUIREMENTS: 5 V +- 10% at 25 mA
TEMPERATURE. OC to 55C.
ACCESSORIES INCLUDED: BNC to alligator clips, ground clip
PRICE IN USA:
Model 10526T, $95.00
Larry