I found this text at wikipedia I think:
Each 4K of memory was called a field. The Memory Extension Controller contained two three-bit registers: the DF (Data Field) and the IF (Instruction Field). These
registers specified a field for each memory reference of the CPU, allowing a total of 15 bits of address. The IF register specified the field for instruction fetches
and direct memory references; the DF register specified the field for indirect data accesses. A program running in one field could reference data in the same field
by direct addressing, and reference data in another field by indirect addressing.
A set of I/O instructions in the range 6200 through 6277 was handled by the Memory Extension Controller and gave access to the DF and IF registers. The 62X1
instruction (CDF, Change Data Field) set the data field to X. Similarly 62X2 (CIF) set the instruction field, and 62X3 set both. Pre-existing programs would never
execute CIF or CDF; the DF and IF registers would both point to the same field, a single field to which these programs were limited. The effect of the CIF
instruction was deferred to coincide with the next JMP or JMS instruction, so that executing CIF would not cause a jump.
Questions:
I get the instruction buffer in the EAR holds the IF until the next JMP/JMS, then it gets copies to the IF.
I'm not sure I'm clear on when the IF and DF are used in executing instructions though.
Obviously IF is used when doing an opcode fetch.
Question 1 - If an instruction references zero page or current page directly, is IF used for that? Does this mean that page zero is no longer always really page zero, but page zero within that field?
Question 2 - DF comes into play when using the indirect bit, is this correct? Like "TAD I ADDR" in this case ADDR is found using IF and then when it is indirectly references it uses DF? Is this the same when depositing and clearing acc? If indirect, then DF comes into play when depositing the value, else not?
Each 4K of memory was called a field. The Memory Extension Controller contained two three-bit registers: the DF (Data Field) and the IF (Instruction Field). These
registers specified a field for each memory reference of the CPU, allowing a total of 15 bits of address. The IF register specified the field for instruction fetches
and direct memory references; the DF register specified the field for indirect data accesses. A program running in one field could reference data in the same field
by direct addressing, and reference data in another field by indirect addressing.
A set of I/O instructions in the range 6200 through 6277 was handled by the Memory Extension Controller and gave access to the DF and IF registers. The 62X1
instruction (CDF, Change Data Field) set the data field to X. Similarly 62X2 (CIF) set the instruction field, and 62X3 set both. Pre-existing programs would never
execute CIF or CDF; the DF and IF registers would both point to the same field, a single field to which these programs were limited. The effect of the CIF
instruction was deferred to coincide with the next JMP or JMS instruction, so that executing CIF would not cause a jump.
Questions:
I get the instruction buffer in the EAR holds the IF until the next JMP/JMS, then it gets copies to the IF.
I'm not sure I'm clear on when the IF and DF are used in executing instructions though.
Obviously IF is used when doing an opcode fetch.
Question 1 - If an instruction references zero page or current page directly, is IF used for that? Does this mean that page zero is no longer always really page zero, but page zero within that field?
Question 2 - DF comes into play when using the indirect bit, is this correct? Like "TAD I ADDR" in this case ADDR is found using IF and then when it is indirectly references it uses DF? Is this the same when depositing and clearing acc? If indirect, then DF comes into play when depositing the value, else not?
