The question of the purpose and action of bit 12, in the T-11's "MODE" register is not easy to answer from available information.

The only comments offered, come from a scant line or two in the T-11 User Guide EK-DCT11-UG

SECTION 4.2.4 - Tester or User Mode (MR<12>)

Tester mode is for Digital Equipment Corporation's use only. If mode register bit 12 is high, (MR<12>=1), user mode is selected.
Timing diagrams on page A-52 seem to offer some hints how the MODE register is sampled during assertion of -BCLR [in 9 intervals], but no specific mention is made of bit 12.

Perhaps the word "Tester" indicates a provision for an In Circuit Tester, and tells the chip to go into tristate on all lines so the device pins can be manipulated without concern for damage.

This would be a fairly forward looking feature to include, based on traditional manufacturing problems of the day.

I've combed the internet for discussions on this, and been unable to locate any additional info.

Does anyone out there have "inside information" or can see if there are any ICT models for the part that might help us with this conclusion?

I'd appreciate a post. I have only a couple places remaining before exhausting everything I can think of to research this topic. [experimenting with my hardware being one of them]